Lex wrote on May 14th, 2012, 4:10am:Are you really expecting us to help you with something that resembles a homework assignment?
Some hints:
- if your swing is a problem, check voltage headroom, and determine what is limiting the voltage headroom.
- if your voltage headroom is the problem, apply some topology that is best for it. Make a good mix and match of NMOS and PMOS. =)
Good luck.
First: Thank you for your reply
Second : I just need help in my way of learning analog design, by the way i have just been graduated from the faculty of engineering, Electronics and Communication Department in 2011 ,means i'm a fresh graduate, and i'm ,now, working as a VLSI Researcher in a research lab ,just started, i have taken this project to learn and to revise the analog info i have taken in the college and to put them in action ,so, i thought of interacting with people in a forum so as to exchange knowledge and experiences . thank you anyway