Steve Mikes wrote on Jun 14^th, 2012, 2:18pm:


If **none** of the connections to the transistor are attached to its probably not a problem.

However it is a very bad practice. Could make for some unpredictable behavior with substrate currents and latchup issues.
Depends on layout and if the substrate region is subject to currents.

Ground your substrate out and tie your N-wells up.

If this pmos is just a switch for slow switching you will likely be ok unless you have the sub current and latch up issues described above.

I would be very leery of a floating bulk in a moderate to high speed circuit. I would also avoid using a floating well transistor in a feedback loop.

I am imagining all kinds of possibilities for unpredictable body effect, possibility of instability or noise/modulation, etc.

The nwell will tend to track the source and drain within a diode drop but you cannot easily predict the phase error or the time constant. Who knows what the floating well will do to the AC input impedance of the fet either.

All that aside I have done it before. But it's not a regular habit as its quite risky.