Annie
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Posts: 5
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Raj, I am designing CML Buffer in 65nm,1.1V MOS and for Current source I am using current mirror with larger L(~500n) to avoid short channel effects.However, the input swing to the buffer is not exactly small(~300mVpp),so the tail node is not exactly at ac ground at all times,rather it follows the higher input after switching takes place and so the vds of the current source changes and hence the tail current.Any hint to solve the problem?
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