i have some questions need your help, some of these may be simple, but i also need your ideas. and the topic may be long.

1, in HV process, i see an inverter like the following picture shows, the resistor may be 100K or some other value. what is the role of the resistor? and how it works?
in the tar file, inv.jpg

2, in two-stage miller compensated opamp, nulling resistor is needed to compensate the RHP zero. in some cases, the Rz is not needed, however. i want to know. when can Rz be removed, and using only a Cc for compensation? in my opinion, when CL is very small, Rz can be removed. but why? any other cases?

3, in the following picture, a ldo is showed.
first, how to analyze the AC characteristic of the loop? what place is the poles (dominant and non-dominant) and zeros located? and how to stablize the loop? here, we assume two cases: CL=1uF and CL=10pF, and Rc is large (may be 200K~500K), current of opamp is very small.
second, how to analyze the PSRR+ characteristic? in allen's book, a two-stage miller compensated opamp (without Rc and R1, CL is relative small) is analyzed, there is one pole and two zeros in allen's book. when Rc and R1 added, we assume two cases also: CL=1uF and CL=10pF, what is the place of poles and zeros? if i want to improve the PSRR+ of low frequency to 100KHz, what should i do? in my opinion, DC gain and dominant pole both need to be large enough, so the DC gain of opamp and the resistance of the upper PMOS can be increased to improve PSRR+, but in allen's book, when increasing the upper PMOS resistance, the two(DC gain and dominant pole) is changed in opposite direction (assuming low current consumption is required here). so, how to improve the PSRR+ of low frequency to 100KHz here? what other ideas? assuming i want PSRR+ to be 25dB at 100KHz.
third, if i use the circuit as a V-I converter, to get an accurate ref current, how to decrease the mismatch of current mirror caused by vds difference? i know, cascode may be a solution, but cascode current mirror may increase the current consumption, and low current consumption is required also here. what other ideas or solutions? if i use cascode, what is the solution of current-minimized?
the last, in the circuit, CL is relative to GND, but in some cases, CL is relative to VDD, and in some cases, two of both is added. what is the difference of the two (CL relative to GND and relative to VDD)?
in the tar file, ldo.jpg

4, in the following pdf, a BPF is mentioned with a external resistor to tune the center frequency f0. but how is this realized? i have checked some papers, but have no ideas yet. can anyone give me some suggestions or advice? it will be very appreciated, thanks.
in the tar file, u2538b.pdf anf bpf.jpg

besides, how to upload more than one picture in the topic.

thanks all for reply in advance. i really need your help.

i really need your advice, waiting for your suggestions, thanks.

it is not homework, i just want to get your help about the questions i mentioned, it is really appreciated for your advice, please have a look. thanks.

The resistor may be esd protection.