Forum
Forum
Verilog-AMS
Analysis
Modeling
Design
Theory
Welcome, Guest. Please
Login
or
Register.
Please follow the Forum
guidelines
.
Jul 17
th
, 2024, 5:25am
Home
Help
Search
Login
Register
PM to admin
The Designer's Guide Community Forum
›
Design
›
RF Design
› peculiar vco phase noise
‹
Previous topic
|
Next topic
›
Pages: 1
peculiar vco phase noise (Read 2791 times)
mixed_signal
Senior Member
Offline
Posts: 183
peculiar vco phase noise
Oct 18
th
, 2013, 7:49pm
Hi,
The phase noise of my vco looks weird with a peaking near the center.
The vco is followed by a Power amplifier followed by offchip matching network. I have control on the matching network components.
Is it parasitic oscillation? How can I fix this? Any materials that discuss solving such issue?
Back to top
vco2.png
IP Logged
raja.cedt
Senior Fellow
Offline
Posts: 1516
Germany
Re: peculiar vco phase noise
Reply #1 -
Oct 20
th
, 2013, 5:40am
Hello,
I haven't seen this kind of results till now, very strange for me. Could be some spur from supply noise or may be bandwidth was too low, which is giving huge peaking.
What is your Bandwidth and reference frequency?
Thanks,
Raj.
Back to top
IP Logged
mixed_signal
Senior Member
Offline
Posts: 183
Re: peculiar vco phase noise
Reply #2 -
Oct 20
th
, 2013, 10:27am
Hi Raja,
I forgot to mention that this is an injection locked oscillator locking to the third harmonic of 800 MHz i.e. 2.4GHz.
But I heard some saying about parasitic oscillation
Back to top
IP Logged
tm123
Community Member
Offline
Posts: 67
Chicago, IL
Re: peculiar vco phase noise
Reply #3 -
Oct 21
st
, 2013, 12:36pm
Does your design use a switching power supply? Looks to me there is a spur at ~3KHz, although the magnitude is not too large. If your oscillator has poor 'pushing' you can get a spur from power supply ripple.
Back to top
IP Logged
Pages: 1
‹
Previous topic
|
Next topic
›
Forum Jump »
» 10 most recent Posts
» 10 most recent Topics
Design
»» RF Design
- Analog Design
- Mixed-Signal Design
- High-Speed I/O Design
- High-Power Design
- Mixed-Technology Design
Analog Verification
- Analog Functional Verification
- Analog Performance Verification
Measurements
- RF Measurements
- Phase Noise and Jitter Measurements
- Other Measurements
Modeling
- Semiconductor Devices
- Passive Devices
- Behavioral Models
- Transmission Lines and Other Distributed Devices
Design Languages
- Verilog-AMS
- VHDL-AMS
Simulators
- Circuit Simulators
- RF Simulators
- AMS Simulators
- Timing Simulators
- System Simulators
- Logic Simulators
Other CAD Tools
- Entry Tools
- Physical Verification, Extraction and Analysis
- Unmet Needs in Analog CAD
General
- Tech Talk
- News
- Comments and Suggestions
- Opportunities
« Home
‹ Board
The Designer's Guide Community Forum
» Powered by
YaBB 2.2.2
!
YaBB
© 2000-2008. All Rights Reserved.
Copyright 2002-2024
Designer’s Guide Consulting, Inc.
Designer’s Guide
® is a registered trademark of
Designer’s Guide Consulting, Inc.
All rights reserved.
Send comments or questions to
editor@designers-guide.org
. Consider
submitting
a paper or model.