Hi Sheldon,
thanks for the reply.
The following stages typically use an MDAC. If I understand the theory correctly, the MDAC is basically a S/H, plus an amplifier, plus a DAC. Therefore the caps need to be sized for kT/C noise just like an S/H. So although its not explicit, the operation is there.
Quote:The implication on kTC noise is that without the sampling capacitor the noise floor will be lower, since the S/H occurs before any gain, that is, the S/H kTC noise is not attenuated.
Thanks. I think I understand it better now.
Quote:I don't think that there is a relationship between no S/H and error correction.
I'm new to mixed-signal, so sorry if I'm on the wrong track here, but I believe there is a relationship. In a typical ADC (not pipelined), a S/H is necessary before any conversion since otherwise the ADC would be sensitive to timing errors. However, for a pipelined ADC, the digital error correction relaxes the requirement on the sub-ADCs such that timing errors ultimately don't show up at the output. Therefore, without error correction, you would need to add the S/H. Feel free to correct me.
Quote:For the subsequent stages removing the capacitors means using resistive gain stages which increases current and results is more loading, less gain from the amplifiers.
Yes that's true assuming there isn't a different way to get the 2x gain.
Aaron