The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
Sep 2nd, 2024, 11:14am
Pages: 1 2 
Send Topic Print
phase plot of an amplifier (Read 13693 times)
GaAs_si
Junior Member
**
Offline



Posts: 24
sandy
phase plot of an amplifier
Nov 19th, 2013, 3:03am
 
Hi all,
I designed an op amp phase is not starting at 0° or 180° can someone please explain why it’s happening like this ?

Thank you.
Back to top
 
View Profile   IP Logged
tm123
Community Member
***
Offline



Posts: 67
Chicago, IL
Re: phase plot of an amplifier
Reply #1 - Nov 19th, 2013, 1:30pm
 
It appears you have 2 AC sources on at the same time.  Try turning off the AC signal on source V28.
Back to top
 
 
View Profile   IP Logged
aaron_do
Senior Fellow
******
Offline



Posts: 1398

Re: phase plot of an amplifier
Reply #2 - Nov 19th, 2013, 5:07pm
 
I think its because of your extremely large L and C. It should be nothing to worry about. You could try plotting your frequency response down to a much lower frequency (microHertz for example).


Aaron
Back to top
 
 

there is no energy in matter other than that received from the environment - Nikola Tesla
View Profile   IP Logged
Tiger_ITRI
New Member
*
Offline



Posts: 5

Re: phase plot of an amplifier
Reply #3 - Nov 20th, 2013, 5:00am
 
By seeing your gain-plot and phase-plot, I think you are desinging a high gain amplifier. A high gain amplifier, more than 100dB, the first pole may at "negative-frequency" when you apply compensation capacitor. So, if the first pole at negative-freuency your phase-plot is not start from 0deg or 180deg. But this is not the only reason that your phase-plot isn't  start from 0deg or 180deg. You can check the gain-plot and pahse-plot near dc  frequency, there maybe a RHP-zero at dc frequecy. You should still check that too.
Hope you are doing well.  :-?
Back to top
 
 
View Profile   IP Logged
GaAs_si
Junior Member
**
Offline



Posts: 24
sandy
Re: phase plot of an amplifier
Reply #4 - Nov 20th, 2013, 5:33am
 
Thank you Tim .I turned off the AC signal on source V28. Still phase plot is not starting at 0° or 180°.  New Graphs are attached below file.

Thank You
Back to top
 
View Profile   IP Logged
GaAs_si
Junior Member
**
Offline



Posts: 24
sandy
Re: phase plot of an amplifier
Reply #5 - Nov 20th, 2013, 5:51am
 
Thank you Aaron & Tiger_ITRI. I plotted frequency response down to a much lower frequency . Graphs are attached but I’m unable to understand that response .

Thank you



Back to top
 
View Profile   IP Logged
tm123
Community Member
***
Offline



Posts: 67
Chicago, IL
Re: phase plot of an amplifier
Reply #6 - Nov 20th, 2013, 6:39am
 
OK it looks like that V28 AC source was effecting your result but removing it did not answer your question.  The frequency response has a zero at low frequency most likely caused by the LC you use to break the loop.  Are you able to run STB analysis?  If so I would highly advise using a stability probe called IPROBE from analogLib and running the STB analysis to find the gain/phase margin.
Back to top
 
 
View Profile   IP Logged
Tiger_ITRI
New Member
*
Offline



Posts: 5

Re: phase plot of an amplifier
Reply #7 - Nov 21st, 2013, 2:01am
 
Yes, you can trying STB analysis and compared these two simulation result.
By the way, if a amplifier is designed rail-to-rail input stage, there maybe zeros at frequency spectrum.
Back to top
 
 
View Profile   IP Logged
GaAs_si
Junior Member
**
Offline



Posts: 24
sandy
Re: phase plot of an amplifier
Reply #8 - Nov 21st, 2013, 4:56am
 
Hi  Tim & Tiger_ITRI  Thank you. I ran STB analysis using IPROBE from analogLib frequency “1 to 1T Hz” and “1n to 1T Hz” I am attaching  Those graphs & set up. It’s not designed for rail-to-rail input stage.

Thank you
Back to top
 
View Profile   IP Logged
Ken Kundert
Global Moderator
*****
Offline



Posts: 2386
Silicon Valley
Re: phase plot of an amplifier
Reply #9 - Nov 21st, 2013, 2:14pm
 
Never, ever, try to simulate loop gain by breaking the loop. It always gives the wrong answer. There are many creative ways to break the loop: using extremely large capacitors and inductors in the feedback loop is one of those ways. People try to tell themselves it is okay because it only breaks the loop only during AC analysis, but the result is the same: no conclusions can be drawn about the stability of the circuit because you changed the circuit. The results of this simulation is meaningless.

If you are using Spectre, learn to use the stb analysis. If using some other simulator, read http://www.kenkundert.com/docs/cd2001-01.pdf and implement it in your simulator.

-Ken
Back to top
 
 
View Profile WWW   IP Logged
aaron_do
Senior Fellow
******
Offline



Posts: 1398

Re: phase plot of an amplifier
Reply #10 - Nov 21st, 2013, 5:27pm
 
Hi Tiger_ITRI,


Quote:
A high gain amplifier, more than 100dB, the first pole may at "negative-frequency" when you apply compensation capacitor. So, if the first pole at negative-freuency your phase-plot is not start from 0deg or 180deg.


What exactly do you mean here? At zero frequency the concept of phase doesn't have any meaning as far as I understand it. Sorry if I misunderstood your point...


Aaron
Back to top
 
 

there is no energy in matter other than that received from the environment - Nikola Tesla
View Profile   IP Logged
Tiger_ITRI
New Member
*
Offline



Posts: 5

Re: phase plot of an amplifier
Reply #11 - Nov 21st, 2013, 6:59pm
 
Hi, aaron_do:
The meaning of that I mentioned before is if an amplifier is high gain, such as more than 100dB, these amplifiers may be desinged by applying cascaed techniques, such as chopper or chopper-stabilized, these techniques usually need higher level and robust compensation techniques such as nested-miller frequency compensation ,NMC ,MNMC...etc. By using that techniques, the dominant-pole is much lower than a gerneral operational amplifier, usually, affter compensation, the dominat-pole may not appear in positive spectrum, because it move to negative-frequency axis by milller pole-splitting theorem.
Have a nice day~
Back to top
 
 
View Profile   IP Logged
aaron_do
Senior Fellow
******
Offline



Posts: 1398

Re: phase plot of an amplifier
Reply #12 - Nov 21st, 2013, 9:42pm
 
Hi Tiger_ITRI,


when you lower the dominant pole frequency, it won't become negative. It may move to 0.0001 Hz for example, but not -10 Hz. As I understand it, the bode plot itself is symmetric around 0 Hz for real signals (I believe its rotational symmetry for phase). Another thing is 0 Hz implies DC or never changing (ever). In this case, phase has no meaning. Feel free to correct me if you think I'm wrong.


regards,
Aaron
Back to top
 
 

there is no energy in matter other than that received from the environment - Nikola Tesla
View Profile   IP Logged
Tiger_ITRI
New Member
*
Offline



Posts: 5

Re: phase plot of an amplifier
Reply #13 - Nov 22nd, 2013, 1:12am
 
Hi, aaron_do:
I think I can agree with you. So, I should correct that I mentioned before. Please any one who visist this board, don't follow the concept that I posted before. Many thanks.
Back to top
 
 
View Profile   IP Logged
nrk1
Community Member
***
Offline



Posts: 81

Re: phase plot of an amplifier
Reply #14 - Nov 23rd, 2013, 8:43pm
 
Though I am not as pessimistic as Ken about breaking the loop, the way it is done here is the trouble.  At 1Hz, 1MH inductor has an impedance of "only" 2pi MOhms. Your gain at low frequencies is about gm*sL, which is why you have an extra phase lead of 90 degrees and a magnitude rising at 20dB per decade.

1GH or 1TH inductor should fix this.  It is not only the cutoff frequency of the breaking network that matters,  but also the impedance it presents to the circuit.
Back to top
 
 
View Profile   IP Logged
Pages: 1 2 
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.