patrick
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Santa Rosa, CA.
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Perhaps something like:
`include "disciplines.vams"
module clkgen(p); output p; electrical p;
reg sclk_int;
initial begin sclk_int = 1'b0; forever begin #(40/2) sclk_int = ~sclk_int; end end analog begin V(p) <+ transition(sclk_int,0,1n,1n); end endmodule
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