The jitter on the clock causes the SNR to drop. It all depends on the slew rate of your sampled signal. Assume a sine of frequency f0, sampled at fs.

the slew rate at any time t is w0 A cos( w0 t). Since the variance on the time is converted to a variance in voltage via this slew rate. The voltage noise increases as the slew rate increases (high f signals). If your signal is uncorrelated with the clock, then you have to integrate the noise over the entire phase (0-2pi) because the slew rate is phase dependent. If your signal is correlated with the clock, you have to take into account this correlation.

If your input sigal is a function f(t + phi1(t)) and the clock is c(wt + phi2(t)) with phi1 and phi2 the time domain phase noise components of the signals, then the SNR of your signal will be determined by the difference between phi1 and phi2. If the phase noise of the signals is correlated (eg generated by the same clock once), the noise will be less. I would try to calculate this for a simple sine wave.

You can calculate the rms^2 phase jitter "difference" as E{(phi1 - phi2)^2}=E{phi1^2} + E{phi2^2} - 2E{phi1 phi2}. The last value is dependent on the correlation between the noise.