without knowing more details:

take pulse train and clock a divide by 2 circuit.

output of divide by 2 should be 50% duty cycle if pulses remain evenly spaced

low pass filter 50% duty cycle wave giving a voltage that is roughly Vpower/2

set up 2 comparators with trip points slightly above and below Vpower/2

digital signals low-middle-high result

when low or high asserts the pulses are not evenly spaced

That is, as requested, an analog method.

A digital method could use the pulses to start-stop counters and compare the difference.

Other solutions are possible as well (PLL and watch the phase detector output and probably others as well)

What about writing a behavioral model that measures the time between pulses and reports 1/0.
  0 if the delay is the same
  1 if the delay is different
need to include some margin for error to account for finite
numerical resolution.

If post simulation why not plot the frequency. It will be constant if the
interval is constant.

                                                                                 Sheldon