Hello, I'm studying CMFB on Razavi's "Analog CMOS IC Design", I have a couple questions and I would really appreciate some help.

At page 323, the author proposes the two following CMFB circuits:

1) The author says that if we neglect channel-length modulation and choose (W/L)15 = (W/L)9, (W/L)16 = (W/L)7 + (W/L)8, then for Vout,CM = VREF   ID9 must track ID15 (in both circuits).
I think that ID9=ID15 only if the sources of M15 and M9 are at the same potential, but how does the circuit force Vsource15=Vsource9?

2) In what sense the second circuit gives a more accurate definition of output MC level?


At page 324, a bit different circuit is proposed.

Razavi says: "Transistors M17 and M18 reproduce at the drain of M15 a voltage equal to the
source voltage M1 and M2, ensuring that VDS15 = VDS9."
How do the two conditions (W/L)17,18 = (W/L)1,2 and Vgate17,18 = Vgate1,2 guarantee Vsource17-18=Vsource1-2?

Thanks in advance for your help.

I followed your suggestions and I solved my doubts. Thanks  :)