Bomestantin
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I need to design PLL that works in wide frequency range and have a small power consumption. So i desided to use Ring VCO in this PLL. Also i am using TSPC frequency divider, because PLL should have pretty high max frequency. The problem is, that Ring VCO has a wider working frequency range than divider. If in locking process voltage on tune input of VCO will be too small or high - PLL fails to lock. I am working on pretty lame process so due to PVT i have to do VCO with wide frequency range, and also due to PVT i can't do wider range of divider. What can i do with this?
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