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Jul 18th, 2019, 6:06am
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Verilo A model (Read 885 times)
ouijdane
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Verilo A model
Jul 03rd, 2018, 5:31am
 
Hello,

I want to write a verilog A code of a space state average model of a dc dc boost converter.

Can anyone tell me the first step and howa should I proceed?

Thank you in advance.
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Geoffrey_Coram
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Re: Verilo A model
Reply #1 - Jul 5th, 2018, 12:24pm
 
I don't know what a "state space average model" is.

What do you want as your inputs and outputs of this model? Can you write equations for currents and voltages, or is a state-space models at a higher level? (in which case, Verilog-A might not be the right language)
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Frank Wiedmann
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Re: Verilo A model
Reply #2 - Jul 6th, 2018, 9:00am
 
If you want to learn about state space average models of dc/dc converters, the books by Christophe Basso (http://cbasso.pagesperso-orange.fr/Spice.htm) are probably a good starting point. If you want to learn Verilog-A, you can start right on this site at http://www.designers-guide.org/VerilogAMS/
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