The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
May 25th, 2019, 12:21pm
Pages: 1
Send Topic Print
MDAC for Pipeline ADC - Timing Analysis - Part 2 (Read 569 times)
repah
Community Member
***
Offline



Posts: 38

MDAC for Pipeline ADC - Timing Analysis - Part 2
Nov 28th, 2018, 5:00pm
 
Hello,

I am examing this MDAC for a Pipeline ADC and am confused about the style of the notation on the schematic in terms of the switches.

What do they mean ?

The switches say VDD/GND and P2D and P1D.

Does that mean set that point to VDD at P2D and GND at P1D ?

How would I do this ?

Thank you.

Back to top
 

MDAC2.png
View Profile   IP Logged
DanielLam
Community Member
***
Offline



Posts: 75

Re: MDAC for Pipeline ADC - Timing Analysis - Part 2
Reply #1 - Nov 29th, 2018, 12:52pm
 
If I had to guess, I'm guessing P1d means the switch has Vdd on it (which probably means on). P2d means the switch has Gnd on it (which probably means off).
Back to top
 
 
View Profile   IP Logged
polyam
Community Member
***
Offline



Posts: 57

Re: MDAC for Pipeline ADC - Timing Analysis - Part 2
Reply #2 - Dec 8th, 2018, 4:28pm
 
VDD and GND are the supply and ground of the switches. If it is a simple transmission gate it means that the bulks are connected to VDD and GND for PMOS and NMOS respectively.
The MDAC essentially works with two non-overlapping clocks and their delayed version.
P1 and P2 are the non-overlapping clocks.
P1D is the delayed version of P1.
P2D is the delayed version of P2.

Hope it's a good guess!
Back to top
 
 
View Profile   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2019 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.