Dear Dr Ken,

 I guess this question has been asked again. I am trying to measure the phase noise of a PFD circuit in the following method:

1) The PFD is driven by a representative input phase shift so that the subtraction of UP & DN pulses generates another periodic pulse

2)  A pss analysis is set up as such: engine set to shooting, no accuracy setting is selected and run transient is set to decide automatically.

3) A pnoise is set up as such: ---sweeptype is set to absolute
                                           ---highest frequency of analysis is fref/2
                                           --- 7 sidebands are selected
                                           --- the output is set to voltage; positive net is UP
                                                negative is DN
                                           ---noise source is set to timeaverage and USB is
                                                selected

4) output noise is plotted in dBV/Hz. Then the conversion gain of the PFD in volts/rad (dB20[conversion_gain]) is used to refer the output noise back to the input; this value is assumed to be the phase noise of the PFD in dBc/Hz.

I would like any and all of your comments with regards to the correctness of this method.

Thanks for your time
Marios

Ok thanks for your time. I have 2 more questions and everyone's answer would be much appreciated.

1) Assuming a traditional CMOS implementation of the PDF and noiseless power rails, noise is injected only during the transitions of the UP & DN pulses. This noise arrives at the output as "packets" and the total output noise is a function of the oscillation period and the noise packet duration ~(t_noise_duration/period_fundamental). For that reason doubling the frequency will theoretically increase thermal noise levels by 3dB and flicker by 6dB (as fundamental period becomes half while noise injection duration remains constant). However, if I use double the frequency, flicker does indeed increase by 6dB while thermal remains the same! I would say that thermal is dominated by a non-periodic noise thus does not scale with frequency but I cannot seem to understand where does this noise come from. It flats out at -170dBv/Hz.

2) If I enclose the PFD within a very wideband PLL without feedback divider, measuring output phase noise should yield the same results as the ones measuring using the method described previously right?

Marios

1) Assuming that the PFD is implemented using static CMOS gates, when UP (DN) is active a PMOS pulls it up and when UP (DN) is low a NMOS pulls it down. Either way the pulling device stops injecting noise at the end of the transition. That is why I said that noise is injected only during the transition.  

But even assuming that noise is injected during the whole period that UP is high as you said, this strengthens the argument that the noise must scale with frequency (width of UP pulse is kept constant in both cases) which only does within the 1/f range.

2) Assume a PLL with no feedback divider and noiseless Loop filter and VCO. The phase noise seen at PLL output is equal to the PFD input referred phase noise right? (Within the loop's BW off course).

Everyone's answer is highly appreciated.