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Apr 25th, 2024, 1:53am
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Analog CMOS IC layout: DRC, DFM, DFR. (Read 986 times)
Tako
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Analog CMOS IC layout: DRC, DFM, DFR.
May 22nd, 2020, 7:53am
 
Regarding CMOS analog IC layout, what are differences between DRC, DFM and DFR?

What I understood during research:
- DRC (Design Rule Check)
checks if a laid out block follows technology rules what ensures dimensional precision and electrical parameters

- DFM (Design For Manufacturing)
additional check on top of DRC. Additional rigorous rules to further increase yield comparing to DRC.

Depending on technology, particular check rules may be included in DRC or DFM, e.g.: antenna effect check may be in DRC or DFM of a given technology in a given foundry.

Is, what I wrote above, correct?

What is DFR (Design For Reliability)? Is that just synonym of DFM?
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Horror Vacui
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Re: Analog CMOS IC layout: DRC, DFM, DFR.
Reply #1 - Jun 1st, 2020, 4:44am
 
DRC: checks whether the layout is safely manufacturable. There are checks among DRC whose focus is to check whether the supplied models are valid.

DFM: easy manufacturing, good repeatability, low manufacturing loss and therefore high yield.

DFR: ensures best practices to avoid aging, i.e. long term reliability of the circuits.

Antenna rules are always part of the DRC in MPW runs, since some dielectric breakdown could cause a small explosion, which might affect a nearby design. I think you might waive these on your own risk if you buy the full wafer.
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Tako
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Re: Analog CMOS IC layout: DRC, DFM, DFR.
Reply #2 - Jun 5th, 2020, 3:19am
 
Great reply! Thank you very much. Should be clear now. In case of further questions, I will ask.
I had a problem finding clear differences, especially between DFM and DFR as I could not find reliable resource of information. It looked as there was no big difference between DFM and DRF. Additionally, it looked as DRC and DFM are in some cases exchangeable. But now, it should be clear.
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