Long extraction time is a typical problem with parasitic extraction.

If your design is large in size, well, it's extraction will take time.

I would suggest to make sure there are no issues with the extraction setup / flow. Are you the first to use this flow, or are there other designers in your organization, who use it? What about their extraction time - is it too long, or OK?
Was extraction setup prepared by a knowledgeable person?

There are a number of settings or tricks that you can use to speed up the extraction.
For example, you can set Cmin and Rmin values - so that any capacitance or resistance below that will be ignored.
But beware of possible accuracy loss.
Also, you can extract in RC-decoupled mode, where all coupling capacitances are redirected to ground.

Do you need to extract power nets? These are huge things, and may take the major portion of the extraction time. Often, analog designers do not extract power nets, i.e. power nets are treated as ideal nodes.

There are a bunch of other things that you can or should check, or tricks that you can use, to speed up the extraction.

Of course, if your vendor (Mentor in this case) provides a good support, you can ask them to help.