The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
May 23rd, 2022, 4:57pm
Pages: 1
Send Topic Print
how to set initial state of digital circuit in AMS simulation? (Read 256 times)
unaffected
Junior Member
**
Offline



Posts: 15

how to set initial state of digital circuit in AMS simulation?
Nov 19th, 2021, 12:27am
 
I am using cadence AMS to do mixed signal simulation(analog circuit + digital circuit(verilog.v)), in digital cicuit, some DFFs used in frequency divider do not have initial reg value, the reg initial value should be set to avoid X state.
Would someone teach me how to set all regs' initial value to 0 or 1?

Many thanks.
Back to top
 
 
View Profile   IP Logged
Geoffrey_Coram
Senior Fellow
******
Offline



Posts: 1994
Massachusetts, USA
Re: how to set initial state of digital circuit in AMS simulation?
Reply #1 - Feb 10th, 2022, 1:46pm
 
Do you have the DFF model, can you edit it to allow specification of an initial reg value?
Back to top
 
 

If at first you do succeed, STOP, raise your standards, and stop wasting your time.
View Profile WWW   IP Logged
Pages: 1
Send Topic Print
Copyright 2002-2022 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.