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Apr 12th, 2024, 7:47am
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Checking undesired substrate mode in transmission line. (Read 273 times)
vlsi_design
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Checking undesired substrate mode in transmission line.
Jul 06th, 2022, 10:01pm
 
Hi,
I am designing a CPW transmission line in CMOS at millimeter-wave frequencies (>60 GHz). I dont have any gnd plane shielding but only the substrate at the bottom. There is a chance that substrate mode starts affecting. How to check this in an EM simulation tool if any unwanted mode is getting triggered? Any visual way to check this using current density etc.?
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