Hi everyone,

I’m currently working on analog circuit design and verification and have run into a few confusing points. I’d really appreciate it if anyone with experience could share their insights! Here are my questions:

1. Most specs for analog circuits focus on performance. When we design circuits like LDOs, opamps, or PLLs, our core goal is essentially to create circuits with sufficient performance. If a circuit fails to meet the predefined performance metrics, it’s considered unqualified in the system. Conversely, a circuit that meets performance requirements will also fulfill its intended system functions. This makes me wonder: How do we distinguish between "performance" and "function" for analog circuits?

2. Is UVM-MS the ultimate solution for analog and mixed-signal verification? In a way, simulations like AC, DC, stb, and noise analysis all represent different perspectives on transient simulations. However, UVM-MS focuses more heavily on tran simulations. This leads me to ask: Can the UVM-MS framework replace traditional analyses like AC, STB, or PSS  simulations? When I use UVM-MS, I keep questioning whether it covers everything needed. I also want to understand: What’s the fundamental difference between relying on UVM-MS versus using AC/PSS/STB simulations?

3. For analog circuits in general, how do we build a complete verification flow? And more practically, how can we prove that a designed analog circuit is truly qualified? This is another key confusion I haven’t been able to resolve.

Thanks in advance for any advice or discussions—your input would be a huge help!

Best Regards
Lewis

Quote:

Analog and mixed-signal verification are the same thing.  Virtually all analog circuits on modern analog system ICs have digital controls.  So you can say you are verifying an analog circuit or you can say you are verifying a mixed-signal circuit.  It is the same thing.  I am a proponent of using the term: analog verification.

I have been focused on analog verification for many years, and I have never used nor considered using UVM-MS.  When I looked at it my conclusion was that it was an attempt to apply digital verification techniques to analog circuits, and it never seemed like a good fit to me.  I got what I needed from plain Verilog-AMS, and I found it was a better fit.

UVM-MS and Verilog-AMS are used mainly for functional verification.  Both employ transient simulation.

The small signal analyses, by their nature, are used for performance verification.

Verilog-AMS can also be used for performance verification but it tends to be used for different performance metrics.  The small signal analyses are used to measure performance metrics associated with small-signals such as bandwidth, stability, noise, etc.  Transient analysis base simulation techniques are more suited metrics associated with large signals and are used to extract inherently nonlinear behavior such as distortion or locking behavior in PLLs.