Designer’s Guide Community

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Subject	Started by	Replies	Views	Last post
Moved: power consumption in ADC - Started by: VNF This Topic has been moved to Circuit Simulators by Ken Kundert
common mode of CML latch	supermoment	5	4855	May 5^th, 2010, 12:39pm By: love_analog
55nm technology	GaAs_si	2	2356	May 4^th, 2010, 7:12pm By: loose-electron
Moved: Jitter transfer BW spec - Started by: supermoment This Topic has been moved to Phase Noise and Jitter Measurements by Ken Kundert
N.O. Clock Gen for Pipelined ADCs	RobG	3	3312	May 3^rd, 2010, 12:00am By: vivkr
unipolar and bipolar PWM	mustakhim	1	5224	May 2^nd, 2010, 7:38am By: love_analog
Strange second order harmonic	Tlaloc	0	1642	Apr 27^th, 2010, 3:37pm By: Tlaloc
Max AC operating voltage VS. AMR	rfmems	1	116	Apr 27^th, 2010, 1:28am By: vivkr
Diodes usage and its need in analog designs.	GaAs_si	1	1949	Apr 25^th, 2010, 2:15pm By: loose-electron
Self-biased current mirror question	Visjnoe	12	11479	Apr 22^nd, 2010, 4:32pm By: love_analog
TIA stability	Dipankar	5	7130	Apr 21^st, 2010, 7:27pm By: HdrChopper
tackling noise in OPAMP : any preferred architecture ???	Dipankar	7	1733	Apr 21^st, 2010, 6:32pm By: HdrChopper
About GBW of common mode feedback	kidhyun	1	1794	Apr 20^th, 2010, 6:38pm By: loose-electron
Moved: how to sim the OTA - Started by: linkernzhang This Topic has been moved to Circuit Simulators by Ken Kundert
Moved: how to do monte carlo simulation of sense amp offset with SOI? - Started by: brain cramp :( This Topic has been moved to Circuit Simulators by Ken Kundert
nonlinearity of cascode MOS straucture	xuedashun	1	1472	Apr 14^th, 2010, 5:41pm By: aaron_do
Moved: PLL Phase Noise Simulation - Started by: Count This Topic has been moved to RF Simulators by Ken Kundert
justification to use RFCMOS vs normal digital CMOS	supermoment	9	6458	Apr 12^th, 2010, 6:40pm By: RFICDUDE
CML/SCL layout	oermens	1	1826	Apr 7^th, 2010, 9:45pm By: love_analog
dummypoly on 65nm	GaAs_si	3	2680	Apr 7^th, 2010, 9:35pm By: love_analog

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