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 Andrew Beckett Senior Fellow Offline Life, don't talk to me about Life... Posts: 1737 Bracknell, UK Re: Question regarding track and hold model Reply #1 - May 3rd, 2004, 2:45pm   Isn't it fairly clear: Code:```// Implement switch with effective series resistence of 1 Ohm if ((\$abstime > tstop – aperture) && (\$abstime <= tstop)) I(hold) <+ V(hold) – V(Pin, Nin); else I(hold) <+ 1.0e–12 * V(hold); // Implement capacitor with an effective capacitance of tc I(hold) <+ tc * ddt(V(hold)); // Buffer output V(Pout, Nout) <+ V(hold); ```The first bit is a switch, which is either a 1 ohm series resistor,or a leakage resistance of 1 teraohm to ground.The second is the equation for a capacitor.And finally V(hold) is used.With Verilog-A you can write the relationship between currents and voltages - you don't always have to formulate the equation so that the voltage is assigned to.For example, a resistor can be defined as: Code:```I(plus,minus) <+ V(plus,minus)/R; ```just as well as: Code:```V(plus,minus) <+ I(plus,minus)*R; ```both forms are effectively equivalent.So do you understand now? If not, can you elaborate on what it is you don't understand?Regards,Andrew. Back to top IP Logged