oliver
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i am a student from china. i am so excited to find this wonderfull website,especially there are some experts like ken kundert.i am a beginner in analog circuit design. currently i am working on pll disign, and foucus on pfd/cp design. i meet a difficulty. i want to simulate pfd/cp's phase noise contribution. i conbined pfd,cp , loopfilter with a ideal vco symbol from ahdlLib to a simple loop. is it a prcatical way to simulate pfd/cp's phase noise contribution? and i meet pss convergence difficulty. how can i deal with it?
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