Hello,

When we integrate a hard IP, eg. PLL, XOSC, ADC, into a SOC, what should I do to prepare the database for behaviorial simulation, physical verification, synthesis, and P&R?

Maybe that is a too big question, for it involves many tools and different design flow. Anybody has good reference about detailed method to generate the files, eg. lef, tlf, v, .lib, etc.?

Thanks

Yawei