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Fractional Divider in Reference Path of PLL (Read 3043 times)

Daniel Nobonzo Guest	Fractional Divider in Reference Path of PLL Sep 10^th, 2004, 12:52am Hi, I wonder if there is any drawback in placing a fractional divider (noise, spurs, ..) in the reference path, i.e. after the crystal, instead of after the VCO. Thanks for your comments. Dan
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emad

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Cairo, Egypt

Re: Fractional Divider in Reference Path of PLL
Reply #1 - Sep 10^th, 2004, 8:01am

It is actually both!

A fractional divider based on DS modulation is pretty noisy. That is because the quantization noise shows as shaped noise with 20*(n-1) dB/dec, where n is the modulator order. This noise at the reference will be further magnified by 20*log(N), where N is the feedback divider ratio.

Same happens for spurs.

For the reference section you want a quiet configuration. You simply can't afford to mess up there.

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strabush Guest	Re: Fractional Divider in Reference Path of PLL Reply #2 - Jan 10^th, 2005, 5:58am Matter of fact, A DDS as the reference is exactly that.
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