sheldon
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Jay,
In the CADENCE ICX reference ahdl library, there are a dnl and an inl testbench modules. The current models are rather limited, for example, 8 bit, single-ended ADCs. However, it is easy to modify the cells. In an append to another e-mail thread, an example of a testbench setup for SFDR was discussed. The same testbench can be used for measuring THD. However, unless you are performing transient noise sumulation or are including noise in a behavioral model and simulating, the SNR simulation is going to measure the ADC quantitazation noise floor, (not very interesting).
Best Regards,
Art Schaldenbrand
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