In "Predicting the phase noise and jitter of PLL-based Frequency Synthesizers", the matlab script for computing Sphi (delta_f) makes use of the periods.m file to calculate the psd. It makes the basic assumption that the consecutive transitions have approx. same width (period).

If my PLL is in a CDR circuit, for which the consecutive transitions are not always periodic, How should i modify the script? I mean to say that my OSC signal is not from a clock, but is actually a data stream which may have a runs of 1 or zero.

Thanks.