that element is OK.. but I found Verilog A to be much more flexible..
for an example, there is a listing for a loop-opener in the paper below which includes an (outdated) example of its use.
"Functional Verification of a Differential Operation Amplifier"
... a fully differential current mirror opamp with n-channel input devices ... support the development of a verification script. Figure 1 Fully Differential Current Mirror Opamp with CMFB The following table ...
http://www.cadence.com/whitepapers/FVofDiffOpAmp_wp.pdf - 309.8KB
Outdated because today one would use the STABILITY analysis to look at loop gain and phase margin..
JBD