I have the following code:

.......
real sample, OutInt;
wire dsample;

always @(posedge dsample) begin
 OutInt = sample;
 <other digital setting>
end
.......

where "sample" is controlled in another process and
it has a behavior like a step.
Instead OutInt is changing even if dsample is stable
and it behaves like a ramp.

Can you explain me why?

I'm expecting OutInt stays constants and it changes
only @ posedge of dsample.