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debugging in Verilog AMS (Read 4484 times)
king
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debugging in Verilog AMS
Aug 17th, 2005, 8:47pm
 
Hi everyone!

How do I print the internal variables of a model at DC
simulation in Verilog AMS?

Thanks.
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Geoffrey_Coram
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Re: debugging in Verilog AMS
Reply #1 - Aug 18th, 2005, 10:09am
 
You should be able to use $strobe.

begin: named_block
 real x;

 x = ....

 $strobe("x=", x);

end


The latest LRM has $debug, which has the same syntax as $strobe, but prints on every iteration of the analog solver; your simulator may or may not support this task yet.
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Re: debugging in Verilog AMS
Reply #2 - Aug 19th, 2005, 2:09am
 
thanks geoffrey.

$strobe does not work.

i can only debug during a transient simulation using
`DEBUG_PRINT("x",x)

is this a problem with my simulator?
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Geoffrey_Coram
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Re: debugging in Verilog AMS
Reply #3 - Aug 22nd, 2005, 5:27am
 
$strobe has been in the Verilog-AMS LRM for quite a while, so yes, it is a problem with your simulator.  Having said this, I now have a vague recollection of a different thread where it was determined that a particular simulator did not have this system task, but did have $write.  (There are subtle differences in the behavior $strobe, $write, $display, $monitor, but I think they're not important for an analog simulation.)

I am not familiar with the `DEBUG_PRINT macro; it is not part of the standard.  Perhaps you can look through the header files and find its definition -- which may use $write (or is it $display?).
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