This is "test_switch.va"
Code:`include "discipline.h"
module test_switch(p,n1,n2);
inout p,n1,n2;
electrical p,n1,n2;
parameter real reff1 = 1 from (0:inf);
parameter real reff2 = 1 from (0:inf);
analog begin
I(n1) <+ -I(p) * reff1/(reff1+reff2);
I(n2) <+ -I(p) * reff2/(reff1+reff2);
end
endmodule
and here is my netlist:
Code:*
simulator lang=spectre
vdda (avdd 0) vsource dc=5
iref (avdd top) isource dc=1
ahdl_include "test_switch.va"
ys1 (top out1 out2) test_switch reff1=1 reff2=2
rl1 (out1 0) resistor r=1k
rl2 (out2 0) resistor r=1k
save ys1:all rl1:all rl2:currents top out1 out2
dc1 dc dev=iref start=0 stop=5
I see the current divided in a 1:2 ratio.
I don't quite understand why I get a different answer if I use
I(p,n1) <+ I(<p>) * reff1/(reff1+reff2);
I(p,n2) <+ I(<p>) * reff2/(reff1+reff2);
I get a 1:2 ratio, and the currents aren't all zero, but the currents into test_switch ys1 don't add up to zero.