The Designer's Guide Community
Forum
Welcome, Guest. Please Login or Register. Please follow the Forum guidelines.
May 5th, 2024, 6:30am
Pages: 1 2 
Send Topic Print
transfer function of a counter (Read 21502 times)
trond
Senior Member
****
Offline



Posts: 168
Glasgow, Scotland
transfer function of a counter
Oct 22nd, 2005, 12:36am
 
Hello all,

I am wanting to model a counter in a control loop with a transfer function so that I can apply control therory to examine stability. I am not quite sure what to use for a transfer function. The system is discrete time and the counter counts the input pules (random) before dumping them to its output. I have considered two possibilities so far:
1) the counter acts as an integrator and thus I could use 1/s or 1/(z-1) as TF.
2) the counter is a decimator and has the TF (1-z-N)/(1-z-1)

I am not quite happy with version 1) as 1/(z-1) does not look at what happens in between sampling instances. Remember that the input pulses occure randomly without a time reference. The TF 1/s does not apply since the overall system is sampled.
Version 2) has I guess the same issue and since there is no set decimation factor N, I don't think this equation applies.

Does anyone have any suggestions, hints, comments...

Thanks a lot,
Sven
Back to top
 
 
View Profile   IP Logged
Jess Chen
Community Fellow
*****
Offline



Posts: 380
California Bay Area
Re: transfer function of a counter
Reply #1 - Oct 22nd, 2005, 11:14am
 
I wonder if this isn't more a question of units. If your control system is working with pulses per some unit of time, then your counter is merely a sensor, not an integrator. It sounds like the pulses do not enter your counter at a constant rate. Is the sample rate of the rest of your system the same as the rate at which your counter outputs data? If so, then I don't see the counter as a decimator either. So if you are trying to control pulse rate and the rest of the system works at the same sample rate as the counter output, then perhaps your counter is just a gain block that measures pulse rate.
Back to top
 
 
View Profile   IP Logged
trond
Senior Member
****
Offline



Posts: 168
Glasgow, Scotland
Re: transfer function of a counter
Reply #2 - Oct 23rd, 2005, 1:07am
 
Jess Chen,

Thanks for your feedback. Indeed the pulses enter the counter without any constant rate. The counter output, however, occurs at a constant rate Ts which is the rate the overall system is clocked.
To model the counter as a simple gain block does not suffice as it does not give insight into stability. An analogy would be a quantizer. A quantizer is sometimes modeled with a variable gain and a phase shift to obtain the systems overall stability (i.e. sigma delta modulators). A constant gain does not provide such insight.

So I am looking to find a TF for a counter wich counts input  pulses and the dumps them after a constant rate to the output.

Thanks a lot for any help.
Sven
Back to top
 
 
View Profile   IP Logged
Jess Chen
Community Fellow
*****
Offline



Posts: 380
California Bay Area
Re: transfer function of a counter
Reply #3 - Oct 23rd, 2005, 10:53pm
 
Sven,
Is the counter measuring pulse rate and is that what you are trying to control? If so, given that the output sample rate is fixed and the pulse count is an integer, why wouldn't you model the coutner as a quantization block, as you described?

For large signal stability, I think I would ignore the quantizer. For small signal stability, if there is any integration in the loop you will probably have a limit cycle and want to analyze its frequency. For that, you could treat the quantizer as a bang-bang controlling element. Another approach to analyzing nonlinear elements is the describing function. Yet another approach is to use ensemble averaging with knowledge of the distribution of the counter input to derive a nonlinear but continuous transfer curve relating input and output averages.

Describing functions and bang-bang controllers are well documented for continuous time systems. I supose there might be a way to adapt them to discrete time systems. But you might be able to approximate the discrete time system with a continuous time system using a bilinear transformation to go from the z-domain to the s-domain.

Regardless of how you decide to model the system, I would check the analysis against time domain simulations.

I am not sure this helps. What does the rest of the system look like? What is the system you are trying to analyze?
Back to top
 
 
View Profile   IP Logged
trond
Senior Member
****
Offline



Posts: 168
Glasgow, Scotland
Re: transfer function of a counter
Reply #4 - Oct 24th, 2005, 2:12am
 
I would like to obtain a quantized representation of the input signal which is a frequency modulated signal. That is why I choose a counter. I am sort of familiar with the describing function method. As mentioned above the quantizer can then be modelled with variable gains and with phase uncertainty. But I could not use the same methods for the counter as it has essentially a pulse train with variable frequency at its input (information is in frequency), and a quantized output at a constant frequency where the information is now in amplitude. A variable gain does not apply here even if we assume the output amplitude to be constant, i.e. just a one bit counter.

I will have a look in to ensemble averaging. Do you have any good references on ensemble averaging?

Thanks for your help Jess Chen.
Back to top
 
 
View Profile   IP Logged
Jess Chen
Community Fellow
*****
Offline



Posts: 380
California Bay Area
Re: transfer function of a counter
Reply #5 - Oct 24th, 2005, 11:10pm
 
I'm not sure I fully understand your application but here's a reference that uses the ensemble averaging I mentioned, although I don't recall if that's what they called it.

-Jess

Analysis and modeling of bang-bang clock and data recovery circuits

Jri Lee   Kundert, K.S.   Razavi, B.  
Dept. of Electr. Eng., Univ. of California, Los Angeles, CA, USA

This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: Sept. 2004
Volume: 39 , Issue: 9
On page(s): 1571 - 1580
ISSN: 0018-9200
INSPEC Accession Number:8113045
Digital Object Identifier: 10.1109/JSSC.2004.831600
Posted online: 2004-08-30 15:04:41.0
Back to top
 
 
View Profile   IP Logged
Frank Wiedmann
Community Fellow
*****
Offline



Posts: 678
Munich, Germany
Re: transfer function of a counter
Reply #6 - Oct 24th, 2005, 11:30pm
 
Just in case you are not aware of it: This article can be downloaded from Ken's personal website at http://www.thekunderts.net/ken/docs/jssc04-09.pdf. You can find a list of his publications at http://www.thekunderts.net/ken/pubs.html, most of them are available for download.
Back to top
 
 
View Profile WWW   IP Logged
trond
Senior Member
****
Offline



Posts: 168
Glasgow, Scotland
Re: transfer function of a counter
Reply #7 - Oct 31st, 2005, 4:33am
 
The reference provided on bang-bang controllers where quite interesting but did not really help me solve my problem. Since a counter is essentially an integrator, I am looking for a continuous time equation (laplace domian) to model a resettable integrator. Any thought on this are greatly appreciated.

Regards,
Sven
Back to top
 
 
View Profile   IP Logged
Jess Chen
Community Fellow
*****
Offline



Posts: 380
California Bay Area
Re: transfer function of a counter
Reply #8 - Oct 31st, 2005, 7:30am
 
Laplace domain transfer functions are usually applied only to linear time invariant systems. Are you sure that's what you have?

-Jess
Back to top
 
 
View Profile   IP Logged
trond
Senior Member
****
Offline



Posts: 168
Glasgow, Scotland
Re: transfer function of a counter
Reply #9 - Oct 31st, 2005, 7:30am
 
Does anyone have the paper "A Nonlinear Integrator for Servomechanisms" by Clegg. It is from 1958 and I just cannot find a copy on the net. In it, Clegg talks about resettable integrators and that they have a phase lag of 38.1 degrees. I  don't know how he came up with that value. Does anyone here know?

Cheers,
sven

Ps. Jess Chen,
I agree with you. But I think cont. time is more suitable as discrete time does not look at all time instances. If a integrator is being reset by it's own state, as with clegg integrators, then the equation describing it should be continous.
Back to top
 
 
View Profile   IP Logged
trond
Senior Member
****
Offline



Posts: 168
Glasgow, Scotland
Re: transfer function of a counter
Reply #10 - Nov 1st, 2005, 3:22am
 
I found the answer to the Clegg integrator.
When excited with a Asin(wt) input, the output of a Clegg integrator will be A/w*(1-cos(wt)). Using the describing function method, we can find the fourier coefficients. They equate to be a1=-A/w and b1=4A/(pi*w). Thus the transfer function is given as b1+j*a1 which will have a phase of 38.1 (pi/4) degrees.
Back to top
 
 
View Profile   IP Logged
trond
Senior Member
****
Offline



Posts: 168
Glasgow, Scotland
Re: transfer function of a counter
Reply #11 - Nov 1st, 2005, 8:30am
 
Having thought about the Clegg integrator, which resets its internal state every time its input is zero, makes me wonder whether a VCO has 90 degrees phase lag or less? I am asking since, at least in the model, a VCO performs a mod function. Thus it resets everytime the state hits 2pi. Is it right then to assume that a VCO might not have exactly 90 degrees phase lag?  
Thanks
Back to top
 
 
View Profile   IP Logged
Jess Chen
Community Fellow
*****
Offline



Posts: 380
California Bay Area
Re: transfer function of a counter
Reply #12 - Nov 1st, 2005, 1:30pm
 
Sven,

I agree that the VCO resets but I would point out two observations:

1. Since the argument of the VCO can be thought of as a trig function, the "reset" events are transparent to the VCO output. It is only at the phase detector that such events become important.

2. In a phase domain model of the VCO, where the output is a sawtooth waveform, the output is not a true steady state quantity. I usually pull the VCO integrator, and the reference integrator, into the PFD model. This has couple of advantages. First, small signal analysis is performed about a true DC quantity (i.e. frequency). And since the DC analysis is valid, the models of the various components can be written to map out lock ranges with just the DC analysis. Second, by placing the integrator (a resettable integrator to be more precise) inside the PFD, the PFD accurately models the hysteresis observed in the relationship between average output and input phase error. Furthermore, the reset value of the integrator can be adjusted to accurately simulate the frequency slewing properties of the PFD. Where was I going with this? In a phase domain model, I think the resettable integrator belongs in the PFD, not the VCO. Furthermore, for small signal analysis, the integrator indeed introduces 90 degrees of phase lag. For large signal analysis, the behavior is highly nonlinear, probably to the point that the usual nonlinear methods, such as describing functions, bear little fruit.
Back to top
 
 
View Profile   IP Logged
trond
Senior Member
****
Offline



Posts: 168
Glasgow, Scotland
Re: transfer function of a counter
Reply #13 - Nov 2nd, 2005, 12:15am
 
Thanks for the response Jess Chen. I am not quite certain whether I understood your answer, so please let me try to ask different question which might shed some more light. I was asking whether a VCO might  have a different phase lag than a conventional integrator as when I have a negative feedback loop with two integrators in the feed forward path  (1/s^2), then the system will go unstable. Notice there is no feedback path in between the two integrators. However, if I replace the second integrator with a VCO, then the loop is stable. If the VCO acts as an ideal integrator, inheriting all its properties, why then is the loop stable? I am sure it due to the mod function that is inherent to VCO’s which will not saturate the system but I might be wrong here.

Cheers,
Sven
Back to top
 
 
View Profile   IP Logged
Jess Chen
Community Fellow
*****
Offline



Posts: 380
California Bay Area
Re: transfer function of a counter
Reply #14 - Nov 2nd, 2005, 11:37am
 
Sven,
It is too bad we could not meet face to face.  It seems we are both having trouble communicating. Im the California and based on when you respond, I suspect you are in Europe.

Before I explain my response, let me ask a couple of questions.

1. Are you working with a PLL?

2. When you replace the ideal integrator with a VCO, I assume you are also switching between phase domain and voltage domain models. Right?

3. Exactly how are you distinguishing between stability and instability?

-Jess
Back to top
 
 
View Profile   IP Logged
Pages: 1 2 
Send Topic Print
Copyright 2002-2024 Designer’s Guide Consulting, Inc. Designer’s Guide® is a registered trademark of Designer’s Guide Consulting, Inc. All rights reserved. Send comments or questions to editor@designers-guide.org. Consider submitting a paper or model.