There is a good description of the factors you might
want to explore, at this linkhttp://www.imse.cnm.es/esd-msd/WORKSHOPS/MIXMODEST/PRESENTATIONS/medeiro1.pdf
Medeiro has done a good job of breaking down the
factors that effect performance.
Next, you might want to spend some more time
thinking about your overall methodology/strategy
for performing this design, in particular, look at the
stuff that Ken has written about top-down design. My
experience is that using just system level, Simulink,
and transistor level simulation is not going to get
you the result you want in the time you want.
You really need to think about using mixed-level
simulation. You will always need to run that final
simulation. You just want to run minimize the number
of times you run that two week long simulation.