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chungmnig

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sigma delta simulation question
Mar 21^st, 2006, 11:43pm

Hi ~~~

I am a Taiwan student ,study in taipei university of
technology.
I research in SC sigma delta ADC.
I have some problem in simulation that.

First i use spectre transient to simulated then use
fft of wavescan to find PSD.
But the noisefloor is always only -40~-30dB , all
blocks are satisfied spec.
I try to redesign but the same.

Is there has any option in transient analysis i should
choose?

another question is how long the simulation time is
enough ?
(if my spec is clock rate 2MHz , input signal is 2KHz)

sorry my english is so poor...
thank for your help ~~!!

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sheldon

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Re: sigma delta simulation question
Reply #1 - Mar 22^nd, 2006, 3:53am

Chungming,

� Please see the following thread,

� �http://www.designers-guide.org/Forum/YaBB.pl?num=1135134048

it includes provides some general guidelines for simulating sigma-delta
A/D Converter. It also reference another discussion about setting up
ADC simulations. It should be possible to achieve low in-band noise
floors with the proper setup, -120dB, and much lower, -150dB, with
more effort.

� �One note: please review the A/D Converter setup discussion. The
current choice of 2kHz as an input frequency may not produce the
expected results. The issues are outlined there.

� � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �Best Regards,

� � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �Sheldon

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chungmnig Community Member Offline Posts: 37	Re: sigma delta simulation question Reply #2 - Mar 22^nd, 2006, 4:23am sheldon very thanks for yoir help And you say 2kHz as an input frequency may not produce the expected results. But my design spec is low frequency low noise sigma delta AD (10Hz ~ 5KHz) How should i do in simulation that thanks~~~!!
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sheldon

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Re: sigma delta simulation question
Reply #3 - Mar 22^nd, 2006, 5:45am

Chungming,

� An example would be to use an 8192 sample FFT for high
accuracy. Assuming that you will use the Hanning window
to suppress spectral leakage, you will need to sample the
input signal twice or setup for the simulation for 4096
samples. So the simulation time is simulation start-up
time + 409.6us. Using window functions such as the Hanning
Window tends to "smear" the signal. In the case of the
Hanning Window, the signal occupies about 1.5 bins. As
a result, it can be difficult to distinguish signal from distortion.
Oversampling reduces the bin size and makes the results
easy to understand. It also acts to suppress the numerical noise
floor.

� So for a 4096 sample FFT and a 2MHz sample rate, you
might want to try to simulate from (11/4096)*2MHz or
5371.09375Hz to (19/4096)*2MHz, 9277.34375Hz, or
(23/4096)*2M, 11230. 46875Hz. Other values in the
input range are (13/4096)*2M, 6347.65625Hz, and
(17/4096)*2M, 8300.78125Hz.

BTW, the choice of 4096 is just a best guess. You may
might want to experiment with more or less FFT samples
depending on the your FFT noise floor requirements.

If you are using Spectre, there are some additional optimizations
that are possible.

� � � � � � � � � � � � � � � � � � � � � � � � � Sheldon

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chungmnig

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Posts: 37

Re: sigma delta simulation question
Reply #4 - Mar 22^nd, 2006, 8:13pm

sheldon ,

i very appriciate your hlep
but how long the start-up time i should be take?
is it means all circuit work properly?
about 1ms is enough? or longer?
how long is enough?

and if choise input signal is 13/8192*2M or 3173.828125Hz (FFT 8192point)
simulation transcient time is start-up 1.26ms (four input signal cycle) + 819.2u = 2.08ms
then use wavescan do FFT from 1.26ms to 2.08ms and 8192 point
the FFT get input signal is 2.6 cycle.....?
is it correct??

and why is 11/4096*2M
why not 12 or 14 /4096*2M
why must be odd number like 11,13,19,23 .........

thanks a lot ~~ ~!!!

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« Last Edit: Mar 22^nd, 2006, 10:06pm by chungmnig »

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sheldon

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Re: sigma delta simulation question
Reply #5 - Mar 23^rd, 2006, 7:54am

Chungming,

� Estimating start-up time is difficult since it is a function of the
circuit design. Ideally, only one sample period is required. However,
if you are using capacitive common-mode feedback, the common-
mode feedback loop can take time a long time to settle. So please
wait until the circuit has reached sinusiodal steady-state before
performing the fft.

� The choices were not odd numbers, for example, 15 was not
included. The choices were prime numbers. If the input frequency
and the sampling frequency are harmonically related, then only
certain frequencies are exercised, that is, all the energy occurs
at the harmonic frequencies.

�For more information about ADC testing, please check the
following link.

http://www.analog.com/UploadedFiles/Associated_Docs/495568568Section8.pdf

� � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �Sheldon

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chungmnig Community Member Offline Posts: 37	Re: sigma delta simulation question Reply #6 - Mar 23^rd, 2006, 9:50am sheldon, very thanks your reply and paper i had already readed the paper and some my curious problem in simulstion would be resoled i will try it~~ very thank for your help~~~~
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Julian18

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Posts: 55

Re: sigma delta simulation question
Reply #7 - Oct 12^th, 2009, 8:03pm

sheldon wrote on Mar 23^rd, 2006, 7:54am:

Chungming,

� Estimating start-up time is difficult since it is a function of the
circuit design. Ideally, only one sample period is required. However,
if you are using capacitive common-mode feedback, the common-
mode feedback loop can take time a long time to settle. So please
wait until the circuit has reached sinusiodal steady-state before
performing the fft.

� The choices were not odd numbers, for example, 15 was not
included. The choices were prime numbers. If the input frequency
and the sampling frequency are harmonically related, then only
certain frequencies are exercised, that is, all the energy occurs
at the harmonic frequencies.

�For more information about ADC testing, please check the
following link.

http://www.analog.com/UploadedFiles/Associated_Docs/495568568Section8.pdf

� � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �Sheldon

Hi Sheldon:
Just out of curiosity, why do we have to choose prime numbers in selecting the input frequency? I built up a behavior model myself, and just tested several f_in's at different bin locations, i.e. 15, 20,23,36. and do 8192-FFT, the simulation figure is in the attachment, which shows that only the fbin=36 case failed to plot a proper output spectrum.

Thanks.

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SCMOD2_spectrum2.png

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Berti

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Re: sigma delta simulation question
Reply #8 - Oct 13^th, 2009, 6:18am

Julian,

Sheldon has already given the reason for selecting a prime number for the input frequency:

Quote:

The choices were prime numbers. If the input frequency
and the sampling frequency are harmonically related, then only
certain frequencies are exercised, that is, all the energy occurs
at the harmonic frequencies.

However, I think the choice of a prime number is more important for other architectures than the sigma-delta modulator where you want to make sure that you signal exercises all codes.

By the way, your 'bad' spectrum seems to be corrupted by spectral leakage. Do you use windowing?

Regards

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Julian18

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Re: sigma delta simulation question
Reply #9 - Oct 13^th, 2009, 8:56pm

Berti wrote on Oct 13^th, 2009, 6:18am:

Julian,

Sheldon has already given the reason for selecting a prime number for the input frequency:

Quote:

The choices were prime numbers. If the input frequency
and the sampling frequency are harmonically related, then only
certain frequencies are exercised, that is, all the energy occurs
at the harmonic frequencies.

However, I think the choice of a prime number is more important for other architectures than the sigma-delta modulator where you want to make sure that you signal exercises all codes.

By the way, your 'bad' spectrum seems to be corrupted by spectral leakage. Do you use windowing?

Regards

Hi, Berti:
Thanks for the reply.
Maybe I am wrong about it, but I believe "Harmonically related" means two frequencies have some common factor. When we are doing FFT, we have to make them "harmonically related", since they are both multiples of bin width.

and for the windowing, you are right, I am just blindly using Rect window. But I can get the right(? or plausible) spectrum when a prime fbin is picked in regardless of the the window type, on the other hand, if I am using Hann window, all numbers seem to lead a reasonable spectrum(see the attachment), prime or not. Any comment on this?

Best Regards.

Julian

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snapshot_004.png

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Berti Community Fellow Offline Posts: 356	Re: sigma delta simulation question Reply #10 - Oct 13^th, 2009, 10:40pm Hi Julian, If you use a rectangular window all you frequencies must to lie on a single bin, otherwise you get noise leakage into neighboring bins. Cheers
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Julian18 Community Member Offline Posts: 55	Re: sigma delta simulation question Reply #11 - Oct 14^th, 2009, 3:16am HI Berti: You are right. I carefully choose the frequency of input to be f_s*bin_location/n_fft. Where bin_location is the desired input frequency location, such as 11, 23, etc. Regards
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ywguo

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Posts: 943
Shanghai, PRC

Re: sigma delta simulation question
Reply #12 - Oct 14^th, 2009, 11:41pm

Hi,

The key is not prime number, but coprime numbers. For example, a composite number 15 is still good for 4096 point FFT because 15 and 4096 are coprime numbers. Since we always do 2^n point FFT in data converter simulation and testing, odd number is always good choice because odd number and 2^n are always coprime numbers.

Hi Julian,

fbin = 36 has spectrum leakage because the chaotic behavior of sigma-detla modulator copromise the coherent sampling. The output is not N complete cycles. When doing simulation, this problem often occurs, but not always occurs. It can occur even if the input signal locates in an odd number bin.

fbin = 20 and 36 look good for 8192 point FFT because the sigma-delta modulator does not show quantization noise clearly. For eg., fbin = 20 and 8192 point FFT, it equivalents to fbin = 5 and 2048 point FFT. That means all quantization noise concentates on bins numbered multiples of 4. It is very clear if you simulate Nyquist rate data converter.

Best Regards,
Yawei

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vivkr

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Re: sigma delta simulation question
Reply #13 - Dec 22^nd, 2009, 5:55am

Hi,

Choosing the signal to fall exactly on a bin and making the signal frequency coprime with respect to the sampling frequency are a must when simulating Nyquist converters with coherent sampling, but not necessary for sigma-delta converters because of 2 reasons:

1. The presence of shaped quantization noise anyway mandates the use of windowing, else everything is fudged up due to spectral leakage. So you anyway do not have coherent sampling.

2. The shaped noise again guarantees that the "quantizer" input is sort of dithered or randomized, preventing the quantization noise power from concentrating on the harmonics. That being said, it is still a good idea not to put the signal frequency in an odd bin.

Regards,

Vivek

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