Estimating start-up time is difficult since it is a function of the
circuit design. Ideally, only one sample period is required. However,
if you are using capacitive common-mode feedback, the common-
mode feedback loop can take time a long time to settle. So please
wait until the circuit has reached sinusiodal steady-state before
performing the fft.
The choices were not odd numbers, for example, 15 was not
included. The choices were prime numbers. If the input frequency
and the sampling frequency are harmonically related, then only
certain frequencies are exercised, that is, all the energy occurs
at the harmonic frequencies.
For more information about ADC testing, please check the