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about pll noise &pss (Read 145 times)
ipmsn5
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about pll noise &pss
Apr 09th, 2006, 6:23am
 
Hi, all
     i encountered the convergence  problem during  pll pss simulation.Now how to solve it?
1,  the voltage control is stable.it is a dc voltage, so i am sure the loop is stable.
2, i set the tstab =30u ,set option = gear2only.
3, howto  set the input frquency?our AE tell us only to use  "port" in analogLib (the simlualtion tool is spectreRF).
4,can you tell me what is mean for " QPSS" can I use it do the pnoise analysis?

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ACWWong
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Re: about pll noise &pss
Reply #1 - Apr 12th, 2006, 6:40am
 
Hi ipmsn5,

Its not quite clear what you are attempting, but based upon point (1) you have an open loop PLL consisting of VCO (held Vtune at by dc source) driving some dividers i guess. As it is open loop you may as well delete any phase detector/chargepump/loopfilter and reference (Xtal & dividers) and you can now do the analysis of VCO noise and VCO feedback divider noise.

2) before running pss, it is usually instructive to run a transient anaylsis to see the settling behavior of you circuit. Then you can decide tstab with confidence.

3) if you are running an non-driven test bench (ie no periodic sources) then you are in oscillator mode, the transient anaylsis of (2) would give you idea of what is a good initial guess at the pss fundamental frequency (which will be the divider's output freq, or the VCO frequency if no dividers are present).

4) Having a converged pss run, acts as the starting point for the pnoise analysis.
QPSS is used for multi-large tone simulations (where there is no harmonic relation between these tones)... you need not use this analysis unless you have a large divide ratio in your VCO feedback.

I suggest you read the spectreRF manual (available in you cadence installation path) and go through a couple of the examples to familiarise yourself with it before using in anger on a large set of circuits...

cheers

alan
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ipmsn5
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Re: about pll noise &pss
Reply #2 - Apr 13th, 2006, 7:38am
 
dear ACWWong
  thank you for your kindly help.
  my problem is below,
1,this behavior model is close loop. after 30us ,this 2-order close loop is stable.then simulate the pss analysis,
so the convergence problem is confused.
2, this close loop include dividers, charge pump.vco.low pass filter.pfd.
3,perhaps , the ADE environment setting  have some problems. the demo show is perfect!!!
thanks
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