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Allennew New Member Offline Posts: 4	How to simulate MOSFET cap~Vg? Jun 01^st, 2006, 5:11pm Hi, I'm wondering how to do the spice3 simulation to get MOSFET capacitance(for example cgg, cgd, cgs) versus Vg as Vg changes from -2 to 2V? Freq. maybe 1MHz. Could anybody provide a simple spice3 netlist? Thank you very much! Allen
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mikki33

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Re: How to simulate MOSFET cap~Vg?
Reply #1 - Jun 2^nd, 2006, 1:56am

To bias the transistor into the desired operation point, put some resistor in series to the terminal where you want to check cap,
use ideal RC (with the same R as to the transistor) and make AC with sweep of C value. Find overlapping outputs, which will correspond to the right cap...

Of course all of the above is valid if transistor models have right modelling of all these effects (or spice3 knows how to simulate them). I have no idea what spice3 is...

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Geoffrey_Coram

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Re: How to simulate MOSFET cap~Vg?
Reply #2 - Jun 2^nd, 2006, 3:57am

I don't believe spice3 (spice3f5 from Berkeley) allows an ac analysis with a swept dc value. You could run a sequence of ac analyses with different Vg values and post process the results.

Otherwise, you probably have to make some changes to the C code of Spice. In particular, say for BSIM3, in the file "b3.c" you will find that the only operating-point parameters that you can ask for are gmbs, gm, gds, vdsat, id, vbs, vgs, vds. You will need to add lines like
OP( "cgg", BSIM3_CGG, IF_REAL, "Cgg"),
OP( "cgd", BSIM3_CGD, IF_REAL, "Cgd"),
OP( "cgs", BSIM3_CGS, IF_REAL, "Cgs"),
and re-compile Spice. (MOS level 1 has lines for Cgs and Cgd, but they are commented out.)

Then you will be able to
save @m1[cgg] @m1[cgd] @m1[cgs]
and these should appear in your output. (You might try it now with save @m1[gm] to see how it comes out.)

Note that these are the internal transcapacitances of the channel charge and do not include the overlap or junction capacitances. Also, the frequency is not used; these are raw capacitances (and if you have gate resistance, the effective impedance ought to depend on frequency). Contrast this with the ac analysis, where you stimulate the gate with an ac voltage and measure the ac current; the imaginary gate current is (2 pi freq) * cgg -- assuming no gate resistance.

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Allennew

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Re: How to simulate MOSFET cap~Vg?
Reply #3 - Jun 2^nd, 2006, 10:19am

Hi Mikki33, spice3 is spice3f5 from Berkeley as Geoffrey said.

mikki33 wrote on Jun 2^nd, 2006, 1:56am:

To bias the transistor into the desired operation point, put some resistor in series to the terminal where you want to check cap,
use ideal RC (with the same R as to the transistor) and make AC with sweep of C value. Find overlapping outputs, which will correspond to the right cap...

Of course all of the above is valid if transistor models have right modelling of all these effects (or spice3 knows how to simulate them). I have no idea what spice3 is...

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Allennew

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Re: How to simulate MOSFET cap~Vg?
Reply #4 - Jun 2^nd, 2006, 10:24am

Geoffrey, thank you very much. Now I can get cgg/cgd/cgs for certain frequency for a single biasing point following your instruction. The only difficulty now is for different biasing. Is there a easy way to set biasing as a parameter (like in Hspice) and then do a loop in Spice3 simulation, instead of biasing by hand and post-processing the results?

Thank you!

Geoffrey_Coram wrote on Jun 2^nd, 2006, 3:57am:

I don't believe spice3 (spice3f5 from Berkeley) allows an ac analysis with a swept dc value. You could run a sequence of ac analyses with different Vg values and post process the results.

Otherwise, you probably have to make some changes to the C code of Spice. In particular, say for BSIM3, in the file "b3.c" you will find that the only operating-point parameters that you can ask for are gmbs, gm, gds, vdsat, id, vbs, vgs, vds. �You will need to add lines like
OP( "cgg", � �BSIM3_CGG, IF_REAL, � �"Cgg"),
OP( "cgd", � �BSIM3_CGD, IF_REAL, � �"Cgd"),
OP( "cgs", � �BSIM3_CGS, IF_REAL, � �"Cgs"),
and re-compile Spice. �(MOS level 1 has lines for Cgs and Cgd, but they are commented out.)

Then you will be able to
save �@m1[cgg] @m1[cgd] @m1[cgs]
and these should appear in your output. �(You might try it now with save @m1[gm] to see how it comes out.)

Note that these are the internal transcapacitances of the channel charge and do not include the overlap or junction capacitances. Also, the frequency is not used; these are raw capacitances (and if you have gate resistance, the effective impedance ought to depend on frequency). �Contrast this with the ac analysis, where you stimulate the gate with an ac voltage and measure the ac current; the imaginary gate current is (2 pi freq) * cgg -- assuming no gate resistance.

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Geoffrey_Coram

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Re: How to simulate MOSFET cap~Vg?
Reply #5 - Jun 5^th, 2006, 4:21am

Allennew wrote on Jun 2^nd, 2006, 10:24am:

Geoffrey, thank you very much. Now I can get cgg/cgd/cgs for certain frequency for a single biasing point following your instruction. The only difficulty now is for different biasing. Is there a easy way to set biasing as a parameter (like in Hspice) and then do a loop in Spice3 simulation, instead of biasing by hand and post-processing the results?

I don't use Spice3 very much; I'm not aware of a looping ability. You must be using the ac analysis, rather than printing out the op-pt values, or else you could just do a regular dc sweep. (Or are you trying to do a nested sweep?)

You could, of course, write a perl script to automatically generate the netlist for different biases (and even have the same script run spice in batch mode (-b) and extract the results).

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Allennew New Member Offline Posts: 4	Re: How to simulate MOSFET cap~Vg? Reply #6 - Jun 6^th, 2006, 1:20pm Thank you very much!!!
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