Faisal wrote on Aug 7th, 2006, 5:45am:Hi,
It is stated in different papers that the capacitor matching accuracy is of the order of 0.05 to 1 percent and its difficult to acheive a higher accuracy. On the other hand, my fab user manual states a formula through which I can acheive better matching accuracy than this number (theoretically) ?
I do understand that there are capacitor layout techniques (in our control) and some fabrication phenomenon (undercut, overetching etc).. But still I cannot find a reasonable explantion for this discrepancy ?
I used a kit recently which according to the matching formulae provided for MIM matching, they can achieve 3 sigma match at 0.06% for a square 31umx31um (2fF/um^2 so 2pF) degrading to 0.2% for 10umx10um.
i'm was a bit sceptical of the formulae as it sounded a bit too good.... but maybe its becoming more true now in well controlled MIM fab steps. Tolerance is typically still at 10~15% for MIMs in most processes.
Anyway I would tend to agree with loose-electron, if you need much better than 1%, then your archtiecture is too demanding... The data of 0.2% 3 sigma quoted by the fab I was using did stipulate those results were obtained using the best matching layout practice across adjacent devices... over say a big switch-cap ADC where inevitably you use alot of caps over a large area, then the 1% rule of thumb is probably still useful, and will definately force you into designing a more robust circuit.
In addition to the notes provided by loose electron, i would add that you also need to be careful of automatic metal pattern fill or metal cheesing, which if not blocked by the user or manual implemented, can cause signficant mismatch MIM parasitic and hence MIM value. For more detail please see the related link to another post on this forum:
http://www.designers-guide.org/Forum/YaBB.pl?num=1146378302cheers
aw