Eugene
|
1. There are several reasons why you might want to construct a phase domain model. First, the phase domain model runs transient analyses much faster. You can even include the critical nonlinearities in your phase domain model. Second, if you move the reference and VCO integrators into the PFD, Spectre linearizes your phase domain model about frequency, which unlike phase, is a true DC quantity. With a legitimate DC operating point, you can use the phase domain model to perform parametric DC analyses that map out lock range. The DC analyses run very VERY fast. Third, the phase domain model simulates loop gain and other transfer functions without using SpectreRF. Getting a SpectreRF simulation of a closed loop voltage domain model just to converge can be pretty tricky. Trying to figure out how to extract a loop gain from the SpectreRF analysis can be even trickier. Fourth, you can add random number generators to model various noise sources and then run relatively fast transient analyses to simulate nonlinear noise effects like those you might see in a frac-N synthesizer.
2. The input AC signal depends on what you want to see. For loop gain, I would insert the AC source between the divider and PFD.
3. Usually, the open loop simulation is for loop gain. The approach I suggested in (2) does that. I'm not sure I understand your question about the closed loop but the phase domain model works well in closed loop too, as long as you can get by the DC convergence problems. I often make my VerilogA model do different things for different analyses. For DC analysis, I make all nonlinear functions monotonic. This eliminates most convergence problems. This forces the operating point to the proper region, if a legitimate operating point exists. If it does not exist, the PFD output tells you. If the magnitude of the PFD output exceeds unity, the PLL is not locked. For transient analysis, I let the nonlinear blocks saturate.
|