simon2 wrote on Oct 10th, 2007, 6:41am:I have also found that looking at say gate capacitance under OP then sweeping bias point and taking OPs at each point generally for most simulators produces a flat line at some arbitrary capacitance value which often is grossly in error with respect to that you will get from an AC or TRAN sim at each bias point, or if you compare it to measured data for the modelled device. My guess is that the simulators are not intended to support DC or OP sims for capacitance in any serious way, as at DC (0 Hz), the result you see is possibly the product of legacy code in the underlying (SPICE) algorithm.
In our internal simulator, you can run a dc sweep and plot the capacitance as a function of bias. Actually, this is the same as doing an ac analysis with a swept bias and a fixed frequency (rather than fixed bias and swept frequency, which is the usual Spice ac); the ac analysis computes the same dc operating point as the dc sweep, and then loads the capacitances (and conductances) into the complex matrix to compute ac currents. The dc sweep just omits the last step, but the operating point and capacitances are computed just as if the ac were going to be performed. I'm quite sure at least one commercial simulator does the same, and I'd be surprised if it weren't -- though some simulators make it easier to do this analysis than others.
You have to be careful about extracting the capacitance from an ac analysis, since having internal resistors (RD, RS) in the model will confuse the issue: dQg/dVd is wrt the internal drain voltage, but the voltage source is applied to the external terminal.
Designers are quite good at using small-signal quantities -- capacitances as well as conductances -- in rules of thumb for setting up their circuits.