jbdavid
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I'll chime in here as well - I have never seen a "charge pump" with a voltage output.. while they usually have fets connected to Vdd and Vss, the biasing is designed so that, when "on" the current matches a reference current.. MAINLY because the supply voltage is usually NOT well known, so trying to use that directly would be MORE difficult than using a current source, not easier. Where Precision/linearity is not the main requirement, it may be that the Rds of the transistor while on gets close enough to a current source that the circuit works acceptably.. In this case, I think L might be > Lmin, and W would only be wide enough for the Peak expected current.. But this would tend to give you a wide variation in current out with Vout, and the effect would be that at a high voltage a "down" would give several times the effect of an "UP" of the same duration, requiring more phase mismatch farther from the center voltage..
In addition the traditional circuit is to use a Voltage Controlled Oscillator and a PI filter for that voltage, as in Proportional and Integrating ) With a Capacitor doing the integration, to get the voltage the natural "steering" quantity is "Current" - and acutally a quantity of Charge proportional to the mismatch in phase, hence the term, "charge pump"
(I'm sure that the way we've learned to describe the problem affects the way we understand and design it... but if you and NOT controlling the quantity of CHARGE getting onto the cap (Current *Ontime), I would suggest that its not really a "charge pump" )
I'll reiterate, I've never seen a "voltage output" charge pump - at least without the resistor.. its possible I didn't recognize it, or that my experience is lacking.
(Ok - correct me if I'm wrong - its friday night, and I did pop back into the office for a little while after a couple of beers across the street.. )
Also this is turning into a discussion of the circuit design, while this section of the forum is devoted to behavioral modeling.
So the impact on your behavioral model, if you have that switch type output, - there will be an RDSon that will depend primarily on the control voltage and supply voltage.. and if Vds is large enough you many run the device into saturation as well (which is about where most current sources WANT to run.. ) so now your current source, resistance path needs to move smoothly between the two modes.. which means you need to closely model the transistor IV characteristic while its on.. In the analog world, one has to be careful when treating transistors like switches.. have a nice weekend.
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