min
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Hi : I have being modeling a 2nd DT sdm using verilog-A. I have model the diff-ota with verilog-A, and I use ideal switch in analogLib. the diff-ota verilog-A model ac and tran simulation result is right. but when I put these model in sdm , the simulator accuracy setting is conservative , when simulation the simulator will have convergence error, and I could't get the result. when I change the simulator accuracy setting to moderate, the simulator will have no error, and I will get the result. but the result has more harmonics. Is my diff-ota modeling has problem , or modeling the switch cap filter has some special requirement to the ota verilog a modeling?
Min
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