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Chip on board parasitical model (Read 7068 times)
email_gz
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Chip on board parasitical model
Mar 30th, 2008, 7:06pm
 
Does any one know the COB parasitical model?
How about the normal value per mm of Rp, Cp ,Lp, Mp/Kp?
Thank you very much:)
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pancho_hideboo
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Re: Chip on board parasitical model
Reply #1 - Mar 31st, 2008, 8:31am
 
email_gz wrote on Mar 30th, 2008, 7:06pm:
Does any one know the COB parasitical model?
How about the normal value per mm of Rp, Cp ,Lp, Mp/Kp?
Thank you very much:)

What do you mean by COB ?
Is it discreate chip components ?

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email_gz
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Re: Chip on board parasitical model
Reply #2 - Apr 2nd, 2008, 1:07am
 
pancho_hideboo wrote on Mar 31st, 2008, 8:31am:
email_gz wrote on Mar 30th, 2008, 7:06pm:
Does any one know the COB parasitical model?
How about the normal value per mm of Rp, Cp ,Lp, Mp/Kp?
Thank you very much:)

What do you mean by COB ?
Is it discreate chip components ?


Hello:
    COB means Chip on board, just bonding the die to PCB .
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pancho_hideboo
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Re: Chip on board parasitical model
Reply #3 - Apr 6th, 2008, 11:05pm
 
In ADS, there are bondwire models. These are available also in RFDE.

See Chapter 4: Passive RF Circuit Components of the followings.

http://eesof.tm.agilent.com/docs/adsdoc2005A/pdf/ccdist.pdf

BONDW_Shape (Philips/TU Delft Bondwire Parameterized Shape)
BONDW_Usershape (Philips/TU Delft Bondwire Model with User-DefinedShape)
BONDW1 to BONDW50 (Philips/TU Delft Bondwires Model)
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Re: Chip on board parasitical model
Reply #4 - Apr 14th, 2008, 8:47pm
 
Thank you pancho_hideboo,it should be helpful to me!
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