Need your help to resolve my puzzles in strobed pnoise analysis using spectreRF for a CMOS (rail to rail) clock tree buffers (driven circuits) running <Ghz.

1. maxsideband,  I did a lot simulations for maxsideband from 5 to 300, I found the pivotal point which can give constant jitter. Ken's paper said this might be pessimistic. How's it done in practice ?

2. Input edge rate:  I use maxsideband from above 1 always.  I change input clock edge rate from 1p (square wave), 100p to sine wave.  I see significant difference on Jitter.   If maxsideband is big enough, it should give enough noise bandwidth to fold.  
 How does jitter has dependence on input clock edge rate (although it defines as sqrt(noise)/slew rate ) ?  Seems to me it should only depend on the circuit (buffer), Rs, Cs.  I may have some wrong understanding on fundamentals.

I highly appreciate your inputs.