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Information about Epitaxial layer (Read 4929 times)
DoYouLinux
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Information about Epitaxial layer
Nov 12th, 2009, 4:53pm
 
Hi all,

I am designing an inductor on chip. In modeling the substrate, I need to know the information about the epitaxial layer. Here are my questions:

1) What is this epitaxial layer for ?

2) Normally, is the relative permittivity of the epitaxial layer equal to that of the silicon, e.g. 11.9 ?

Thanks a lot guyssss,  ;)

DYL
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Riad KACED
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Re: Information about Epitaxial layer
Reply #1 - Nov 15th, 2009, 10:33am
 
Hi,

The answer to your question is pretty much in all the descent IC books.
In summary, The epitaxial layer is thin lightly doped layer that is deposited on top of the usually heavily doped wafer. The devices are actually formed in that epi layer. The epitaxial process has been primarily designed for bipolar isolation and it provides a better latch up performance as well. You can read more stories on the Internet I suppose.

This is a Snippet from the Nano-CMOS circuit and physical design By Ban P. Wong:

http://books.google.co.uk/books?id=MlAlzr_2K8MC&lpg=PP1&dq=nano%20cmos%20circuit...

Well, I do not know the answer for the second question as it is related to the process technology you are using. You better ask the foundry guys for this.

Cheers,
Riad.
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Riad KACED
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aLittleKnowledge
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Re: Information about Epitaxial layer
Reply #2 - Jul 13th, 2010, 4:15am
 
"is the relative permittivity of the epitaxial layer equal to that of the silicon"
Yes. The relative permittivity silicon is largely unaffected by normal doping, even at the relatively heavy doping levels used in the substrate.  We don't normally bother modifying the value even in the emitter-base junctions of bipolar transistors.
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modelman
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Re: Information about Epitaxial layer
Reply #3 - Jan 31st, 2011, 6:58pm
 
Also make sure to properly model the resistance of the epi layer

depending on its resistivity versus the resistivity of the substrate you may observe different Q values, particularly at frequencies beyond peak Q
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