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Switched Capacitor, pss and pac
Mar 04^th, 2010, 1:50am

Hello everyone,

I am trying to simulate the frequency response of a very simple sc circiut. But i guess i am not able to generate any useful results, as a matter of fact, i (almost) dont have any idea how to do that. I have read a lot and i know it is somehow possible with pss and pac. But i just cant get these simulations up running. Maybe theres someone who can help me.

Here some facts about my workspace:

Tool: Cadence Virtuoso ADE L using Spectre

The attached file includes all screenshots i took.

"sc_sch" shows the circiut. Its supposed to be a low pass using sc. As the input source I chose "vsource" with "type dc" and "pacmag 1V". Nothing else is set.

PHI and PHIbar are "vsource" with "type pulse". The options taken can be seen in the screenshots.

Well, after doing everything as seen on the screenshots, I run pss and pac but all i get is an empty graph titeling "AC Response", but there's nothing to see.

Can Anybody help me with this?

computaholic

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sc.zip

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pancho_hideboo

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Re: Switched Capacitor, pss and pac
Reply #1 - Mar 4^th, 2010, 2:06am

Your circuit is a simple parallel SC same as attached figure.

Show me your netlist.

computaholic wrote on Mar 4^th, 2010, 1:50am:

Well, after doing everything as seen on the screenshots, I run pss and pac but all i get is an empty graph titeling "AC Response", but there's nothing to see.

BTW, why do you plot "AC Response" not "PAC Response" ?

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Parallel_SCF.png

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pancho_hideboo

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Re: Switched Capacitor, pss and pac
Reply #2 - Mar 4^th, 2010, 2:21am

Netlist for "Tran_Impulse" Quote:

// Generated for: spectre
// Generated on: Apr 23 21:13:18 2001
// Design library name: MyTestLib
// Design cell name: Parallel_SCF
// Design view name: schematic
simulator lang=spectre
global 0
parameters tw_in=1u tw=3u tr_in=0.05u tf_in=0.05u tf=0.05u dv=1e-3 VL=-0.5 \
� �VH=0.5 tr=0.05u tperiod=12.5u td1=1u k=2 \
� �td_in=(td1+tr+tw)-(tr_in+tw_in/2) td2=td1+(tperiod-k*(tr+tw+tf))

// Library name: MyTestLib
// Cell name: Parallel_SCF
// View name: schematic
Vimpulse1 (Vin 0) vsource dc=5 type=pulse delay=td_in val0=0 val1=1 \
�period=1K rise=tr_in fall=tf_in width=tw_in pacmag=1
Vimpulse2 (net22 0 Vin 0) vcvs gain=1
R1 (Vct_out net22) resistor r=25K
SW1 (Vin Vmid phi1 0) relay vt1=(VL+VH)/2-(dv) vt2=(VL+VH)/2+(dv) \
�ropen=10M rclosed=10m
SW2 (Vmid Vsc_out phi2 0) relay vt1=(VL+VH)/2-(dv) vt2=(VL+VH)/2+(dv) \
�ropen=10M rclosed=10m
Phai_2 (phi2 0) vsource type=pulse val0=VL val1=VH period=tperiod \
�delay=td2 rise=tr fall=tf width=tw fundname="Phai_2"
Phai_1 (phi1 0) vsource type=pulse val0=VL val1=VH period=tperiod \
�delay=td1 rise=tr fall=tf width=tw fundname="Phai_1"
C2 (Vct_out 0) capacitor c=1n
C6 (Vsc_out 0) capacitor c=1n
C3 (Vmid 0) capacitor c=500.0p
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
� �tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
� �digits=5 cols=80 pivrel=1e-3 ckptclock=1800 \
� �sensfile="../psf/sens.output"
tran tran stop=4.096m maxstep=0.05u write="spectre.ic" \
� �writefinal="spectre.fc" annotate=status maxiters=5
finalTimeOP info what=oppoint where=rawfile
save phi1 phi2 Vin Vmid Vsc_out Vct_out
saveOptions options save=selected

Attached figure is "Time Domain Waveforms" for Transient Analysis.

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Parallel_SCF_time.png

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pancho_hideboo

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Re: Switched Capacitor, pss and pac
Reply #3 - Mar 4^th, 2010, 2:22am

Netlist for "PSS_PAC" Quote:

// Generated for: spectre
// Generated on: Apr 23 21:16:27 2001
// Design library name: MyTestLib
// Design cell name: Parallel_SCF
// Design view name: schematic
simulator lang=spectre
global 0
parameters tw_in=1u tw=3u tr_in=0.05u tf_in=0.05u tf=0.05u dv=1e-3 VL=-0.5 \
� �VH=0.5 tr=0.05u tperiod=12.5u td1=1u k=2 \
� �td_in=(td1+tr+tw)-(tr_in+tw_in/2) td2=td1+(tperiod-k*(tr+tw+tf))

// Library name: MyTestLib
// Cell name: Parallel_SCF
// View name: schematic
Vimpulse1 (Vin 0) vsource dc=5 type=dc delay=td_in val0=0 val1=1 period=1K \
�rise=tr_in fall=tf_in width=tw_in pacmag=1
Vimpulse2 (net22 0 Vin 0) vcvs gain=1
R1 (Vct_out net22) resistor r=25K
SW1 (Vin Vmid phi1 0) relay vt1=(VL+VH)/2-(dv) vt2=(VL+VH)/2+(dv) \
�ropen=10M rclosed=10m
SW2 (Vmid Vsc_out phi2 0) relay vt1=(VL+VH)/2-(dv) vt2=(VL+VH)/2+(dv) \
�ropen=10M rclosed=10m
Phai_2 (phi2 0) vsource type=pulse val0=VL val1=VH period=tperiod \
�delay=td2 rise=tr fall=tf width=tw fundname="Phai_2"
Phai_1 (phi1 0) vsource type=pulse val0=VL val1=VH period=tperiod \
�delay=td1 rise=tr fall=tf width=tw fundname="Phai_1"
C2 (Vct_out 0) capacitor c=1n
C6 (Vsc_out 0) capacitor c=1n
C3 (Vmid 0) capacitor c=500.0p
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
� �tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
� �digits=5 cols=80 pivrel=1e-3 ckptclock=1800 \
� �sensfile="../psf/sens.output"
pss �pss �period=12.5u �harms=0 �maxacfreq=1M �annotate=status
pac �pac �sweeptype=absolute �start=10 �stop=40k �maxsideband=2
+ � �annotate=status �freqaxis=absout
save Vsc_out Vct_out
saveOptions options save=selected

Attached figure is "Frequency Responses".

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Parallel_SCF_freq.png

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computaholic

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Re: Switched Capacitor, pss and pac
Reply #4 - Mar 4^th, 2010, 3:05am

Ok, here is my netlist:
[ Quote:

// Generated for: spectre
// Generated on: Mar �4 10:39:24 2010
// Design library name: neuro_opamp_lib
// Design cell name: sc_lowpass_tb_01
// Design view name: schematic
simulator lang=spectre
global 0
parameters Ibias=-1u rcut=1M ccut=1p Vdd=3.3 Csc=25f Clp=20p frq=640k \
� �PulseCut=10n inputfrq=100
include "/usr/prog/lfoundry/LF150/V1.2.0/PDK_LF150C_V1_2_0/models/spectre/LF150_Spectre.
scs" section=MOS_tt
include "/usr/prog/lfoundry/LF150/V1.2.0/PDK_LF150C_V1_2_0/models/spectre/LF150_Spectre.
scs" section=act_t
include "/usr/prog/lfoundry/LF150/V1.2.0/PDK_LF150C_V1_2_0/models/spectre/LF150_Spectre.
scs" section=pas_t
include "/usr/prog/lfoundry/LF150/V1.2.0/PDK_LF150C_V1_2_0/models/spectre/LF150_Spectre.
scs" section=fix

// Library name: neuro_opamp_lib
// Cell name: sc_lowpass_tb_01
// View name: schematic
C_Csc (net046 0) capacitor c=Csc
C_Clp (pVout 0) capacitor c=Clp
M0 (net046 lPHI lVin lVin) nmos_3 w=7.5u l=400.0n as=(3.375e-12)/(1) \
� � � �ad=(3.375e-12)/(1) ps=(15.9u)/(1) pd=(15.9u)/(1) m=(1)*(1)
M1 (pVout lPHI_BAR net046 net046) nmos_3 w=7.5u l=400.0n \
� � � �as=(3.375e-12)/(1) ad=(3.375e-12)/(1) ps=(15.9u)/(1) \
� � � �pd=(15.9u)/(1) m=(1)*(1)
M2 (net046 lPHI_BAR lVin lVin) pmos_3 w=18u l=400.0n as=(8.1e-12)/(1) \
� � � �ad=(8.1e-12)/(1) ps=(36.9u)/(1) pd=(36.9u)/(1) m=(1)*(1)
M3 (pVout lPHI net046 net046) pmos_3 w=18u l=400.0n as=(8.1e-12)/(1) \
� � � �ad=(8.1e-12)/(1) ps=(36.9u)/(1) pd=(36.9u)/(1) m=(1)*(1)
V3 (lVin 0) vsource dc=Vdd/2 type=dc pacmag=1 phase=1
PHI_BAR (lPHI_BAR 0) vsource type=pulse delay=(1/(2*frq)) val0=0 val1=3.3 \
� � � �period=1/frq rise=2n fall=2n width=(1/(2*frq)) - PulseCut
PHI (lPHI 0) vsource type=pulse val0=0 val1=3.3 period=1/frq rise=2n \
� � � �fall=2n width=(1/(2*frq)) - PulseCut
simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \
� �tnom=27 scalem=1.0 scale=1.0 gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 \
� �digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \
� �checklimitdest=psf
pss �pss �fund=640K �harms=0 �errpreset=liberal �tstab=1.5m
+ � �saveinit=yes �maxacfreq=50M �tstabenvlp=no
pac �pac �start=1 �stop=50M �dec=1 �maxsideband=1 �annotate=status
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts �where=rawfile
save lVin pVout
saveOptions options save=allpub

If Im displaying AC instead of PAC, how can I display PAC? The AC Response window just pops up automatically.

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pancho_hideboo Senior Fellow Offline Posts: 1424 Real Homeless	Re: Switched Capacitor, pss and pac Reply #5 - Mar 4^th, 2010, 3:08am computaholic wrote on Mar 4^th, 2010, 3:05am: If Im displaying AC instead of PAC, how can I display PAC? It seems simply you can't understand plotting in Cadence ADE. Use "Direct Plot Form" in Cadence ADE.
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computaholic New Member Offline Posts: 4	Re: Switched Capacitor, pss and pac Reply #6 - Mar 4^th, 2010, 3:58am All Right! The Direct Plot Main Form did the work. I guess there were actually no mistakes, but i had trouble plotting it. Another questions has come up: What does the sidebands option do?
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pancho_hideboo Senior Fellow Offline Posts: 1424 Real Homeless	Re: Switched Capacitor, pss and pac Reply #7 - Mar 4^th, 2010, 4:15am computaholic wrote on Mar 4^th, 2010, 3:58am: Another questions has come up: What does the sidebands option do? Enter "spectre -h pac" in unix command line. Then read its messages. For your case, sideband which you should look is zero.
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