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definition of VDSAT -- for an LDMOS (Read 7241 times)
Geoffrey_Coram
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definition of VDSAT -- for an LDMOS
May 26th, 2010, 5:37am
 
In another thread ( http://www.designers-guide.org/Forum/YaBB.pl?num=1101762622 ) it was discussed how a simplistic calculation for VDSAT is VGS-VTH, but this doesn't work even for BSIM3 because of various additional effects.

I have some designers who are interested in VDSAT for an LDMOS device, which has a channel region and a drift region.  In some LDMOS models, such as Philips/NXP's MOS20, there is an internal drain node, and two saturation voltages (one for the channel and one for the drift).

Does anyone have a useful definition of VDSAT that's general enough to handle this case?  The designers want to be in saturation, such that that output resistance is "high."  So, I could imagine, "VDSAT is the voltage at which the output resistance is ____."  Is that number a fixed value?  Something that depends on L and W?  Dependent on the output resistance at Vds=0?

I'd be interested in hearing your thoughts.
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AnalogDE
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Re: definition of VDSAT -- for an LDMOS
Reply #1 - May 26th, 2010, 11:22am
 
The number isn't fixed -- your output resistance needs to be high enough in order to meet your spec (e.g. gain).  You need to have enough Vds across a device (plus some margin) so that your specs are met and your design works across corners.  

I usually look at the Vdsat reported by the simulator in a .OP analysis and I'm usually looking for atleast 100mV Vds higher than Vdsat, worst case.  But I'll look at my gain first before I even look at Vds biases and that's where I'll notice a problem if any.
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« Last Edit: May 26th, 2010, 1:53pm by AnalogDE »  
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Geoffrey_Coram
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Re: definition of VDSAT -- for an LDMOS
Reply #2 - May 27th, 2010, 5:50am
 
Thanks for the response.  However, I'm working on this from the other direction: I develop the simulator, and I want this LDMOS model to report a VDSAT, but I need to know what it is the designer is looking for.
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Mooraka
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Re: definition of VDSAT -- for an LDMOS
Reply #3 - May 27th, 2010, 5:57am
 
I think the simulator should be able to print both Vdsat values and designer may need to operate between these two values to get high Rout.

Thanks
Ram
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