There is a lot of good material on both modeling and verification in the paper archives at
http://www.bmas-conf.org .
I of course have been suggesting that this field is crucial to the future of most SOC development.. Steve Leibson of the eda360 insider blog
http://eda360insider.wordpress.com is reporting some interesting developments in this area as well.
However it a forum such as this is a poor vehicle in which to give an overview.
I will say that testbench and instrumentation development for the design and automating the results are twice the work of actually writing the models, so you should keep that in mind when staffing your project.
If you are getting started with this, I recently discovered that a decent set of (open source) ic design tools are included in the "free electronics lab" spin of Fedora (the fedora-FEL spin) that is only a 1.3G live dvd download, ready for you to install.
for analog verification tools include ngspice, icarus verilog and gnucap , as well as enhancements to Eclipse to support both verilog and vhdl editing.
good luck!