Hello,

I am very interested in the analog verification discussed here.
I am wondering how would you do my troublesome problems.
It would be grateful to hear your opinion and experience.

1. I used to do mixed-signal chip level verification by making behavioral
model of analog blocks with verilog-HDL. I would like to start modeling
by verilog-AMS for more complex design.
Co-simulation of RTL and verilog-AMS is possible in my design
environment, but users do not have that. In this case, both behavioral
model described in verilog and that described in verilog-AMS are needed,
because users need the chip model described in verilog to verify their
system. I guess it would bother me.

2. It will be helpful to see spectrum in frequency domain quickly.
However I have to dump data and transfer the other FFT tool.
Do you know the easy way to do FFT with NCverilog?

3. It is possible to pass/fail judge by comparing the simulated data
with the expected data in digital verification. But it is needed to
check wave forms again and again when real value is used in the
behavioral model. How do you address this messy work?