Dear all,

I am designing a VCO (quartz crystal at 80 MHz). I would like to do Phase-Noise/Jitter simulation, but the results are not coherent.

1 - In PNOISE should I choose FM or PM type of measurement ? If I choose PM, the "Threshold Value" should be set to Vpeak / 2 (where the zero crossings occur), right ?

2 - If I choose "Crossing Direction" to all, that means that I will have the jitter on the rising and falling edges. How does this work ? Can I calculate the jitter for both edges ?

3 - A completely different subject. I am simullating, both in weak and strong inversion. I thought that exponential law of the weak inversion would reduce 1/f noise, and thus the upconversion. I get a better plot of Phase-noise but worse values of jitter. Especially when I approach the harmonic. Please see the attached picture. Basically I have a very small harmonic, and when calculating the Jcc, its value keeps constant until I get close to the harmonic. I seems there is no contribution from 1/f^3 noise. Please notice that I did a FM simulation not PM. And the integration limits from 1 - 80 MHz (Crystal's frequency).

Best regards,
Pedro

Hi thanks for your answer. Do you mean taking the output from the gate of the transistor rather from the drain ? At least no distortion that way.

But my main concerns arequestions 1, 2 and 3. That is which simulations are more appropriate to this type os circuit. For,  PNOISE with PM or FM
and how to setup them. "Threshold Voltage, Integration limits, ...."

Best regards,
Pedro