raja.cedt wrote on Nov 9th, 2011, 5:56am:hello,
i am sorry for my previous post. So if you have razaavi could you please verify page no..371. He has derived TF for the left ckt, it is gm*rds*gm/Cc. You get gm/cc only if there only cap feedback aorund the transister. By refering razavi page no 176, it has simple method to estimate zero location, i would suggest you to estimaate with this method without deriving full equations.
And comming to smal signal models, whats the diference between both of these ckts, in one case you have PMOS commongate amplifier and in another case you have NMOS commongate amplifier, so small signal model don't care about NMOS and PMOS. One more thing both circuits have zero in RHP, because forward path an feedback path are having oppsite polarity gains.
Once again sorry for the previous post.
Thanks,
Raj.
I have read the pages of Razaavi you mentioned, but Razaavi says"this topology contains a zero in the left half plane" just up his equation 10.42.
I tried the method on the page 176 for the left ckt.In this way I got a RHP zero. It is ovious that the two results are in contradiction.
By the way, I think the forward path of the left ckt is somehow weird,since the signal will go from the drain to the souce of the common gate PMOS?
Thanks~